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Maxim > Solutions > Transport Nodes, Access Nodes, Add/Drop Multiplexers, and Digital Cross-Connects

Clock Recovery

DATA SHEETS
Display Title / Parts Key Advantages
QV  PDF Evaluation Kit for the DS34T101, DS34T102, DS34T104, DS34T108, DS34S101, DS34S102, DS34S104, and DS34S108
DS34T108DK

QV  PDF Single/Dual/Quad/Octal TDM-Over-Packet Chip
DS34T101, DS34T102, DS34T104, DS34T108

Supports CESoPSN, SAToP, and TDMoIP Transport Over a Packet-Switched Network for Up to 8 E1/T1 Ports
QV  PDF Stratum 2/3E/3 Timing Card IC
DS3101

SONET/SDH Stratum 3/3E Compliant Timing Card IC
QV  PDF Stratum 2/3E/3 Timing Card IC
DS3100

A Complete SONET/SDH Timing Card on a Single IC
QV  PDF T1/E1/J1/64KCC BITS Element
DS26504

QV  PDF Quad T1/E1/J1 Transceivers
DS21455, DS21458

Industry's First 4-Port Transceivers to Switch Among All T1, E1, and J1 Standards without External Component Changes
QV  PDF E1 Quad Transceiver
DS21Q58

QV  PDF E1 Quad Transceiver
DS21Q59

QV  PDF 3.3V E1/T1/J1 Quad Line Interface
DS21448

3.3V E1/T1/J1 Quad Line Interface Unit for Short-Haul and Long-Haul Applications
QV  PDF High-Performance Demo Kit Motherboard
DK2000

QV  PDF Low-Power, Compact 2.5Gbps/2.7Gbps Clock-Recovery and Data-Retiming IC
MAX3873A

QV  PDF Quad E1 Transceiver
DS21Q50

E1 Quad Transceiver Contains All the Functions Necessary for Connecting to Four E1 Lines
QV  PDF 622Mbps, 3.3V Clock-Recovery and Data-Retiming IC with Limiting Amplifier
MAX3676

High-Performance, Low-Power 622Mbps CDR



Key Specifications:   Clock and Data Recovery
Part Number Functions Target Operating Range (Gbps) Min. Data Rate (Mbps) Max. Data Rate (Mbps) Multirate Supply Voltage (V) Typ. Supply Current (mA) I/O Type Input Sens. (mV) Package Operating Temp. Range (°C)
MAX3873A 
CDR
1 to 4.5 2488 2670 Yes 3.3 79 CML 50 QFN/20
TQFN/20
-40 to +85
MAX3676 
CDR
<1 622 622 No 3.3
5
65 PECL  -  TQFP/32 -40 to +85
See All Clock and Data Recovery (8)

Key Specifications:   T/E Carrier & Packetized Design Kits
Part Number Overview Kit Product Line Kit Hardware Kit Software Technical Documentation
DS34T108DK  NEW! DS34T108DK EV-Kit TDM-over-Packet
BNC Cables (2)
BNC Converter (2)
Cat- 5 Crossover Cable
Cat- 5 Patch Cable
Design Kit Chassis
Power Cord
Chipview Configuration Software
Driver Source Code
Example Application Source Code
Data Sheet
User's Guide
See All T/E Carrier & Packetized Design Kits (16)

Key Specifications:   T/E Carrier & Packetized Products
Part Number Transmission Standard Functions Number of Channels Input to Output Clocks (MHz) Supply Voltage (V) EV-Kit Package Smallest Available Package (max w/pins) (mm2)
DS26504  64kHz - G.703 II.2 Japanese 6312kHz Clock
64kHz - G.703 II.1 Japanese 64kHz Clock
64kHz Composite Clock - G.703 Level B
64kHz Composite Clock - G.703 Level A
64kHz Composite Clock - GR378
T1/E1/J1
BITS Element
1 0.008
0.064
1.544
2.048
6.312
19.44
3.3 Yes LQFP/64 149
DS21455  T1/E1/J1
Framer + LIU
4  -  3.3  -  0/0  - 
DS21458  T1/E1/J1
Framer + LIU
4  -  3.3 Yes CSBGA/256 289
DK2000  ATM
E1
STS-1
T1/E1/J1
T1/J1
T3/E3
 -   -   -  3.3
5
 -  See Data Sheet  - 
DS21448  T1/E1/J1
LIU
4  -  3.3 Yes LQFP/128
TEPBGA/144
289
DS21Q58  E1
Framer + LIU
4  -  3.3  -  LQFP/100 262
DS21Q59  E1
Framer + LIU
4  -  3.3 Yes LQFP/100 262
DS21Q50  E1
Framer + LIU
4  -  3.3  -  LQFP/100 262
See All T/E Carrier & Packetized Products (102)

Key Specifications:   TDM-Over-Packet
Part Number Number of Integrated T1/E1 LIU+Framer Number of T1/E1/Serial Streams Number of T3/E3, STS-1 Serial Ports Mapping Methods PSN Encapsulation Protocols 10/100 MAC Interface Processor Interface Package
DS34T101  NEW! 1 1 1 AAL1
CESoPSN
HDLC
SAToP
Structured
Structured with CSA
TDMoIP
Unstructured
L2TPv3 (IPv4, IPv6)
MEF-8
MPLS
RTP
UDP (IPv4, IPv6)
MII
RMII
SSMII
16-Bit
32-Bit
SPI
0/0
DS34T102  NEW! 2 2 1 AAL1
CESoPSN
HDLC
SAToP
Structured
Structured with CSA
TDMoIP
Unstructured
L2TPv3 (IPv4, IPv6)
MEF-8
MPLS
RTP
UDP (IPv4, IPv6)
MII
RMII
SSMII
16-Bit
32-Bit
SPI
0/0
DS34T104  NEW! 4 4 1 AAL1
CESoPSN
HDLC
SAToP
Structured
Structured with CSA
TDMoIP
Unstructured
L2TPv3 (IPv4, IPv6)
MEF-8
MPLS
RTP
UDP (IPv4, IPv6)
MII
RMII
SSMII
16-Bit
32-Bit
SPI
0/0
DS34T108  NEW! 8 8 1 AAL1
CESoPSN
HDLC
SAToP
Structured
Structured with CSA
TDMoIP
Unstructured
L2TPv3 (IPv4, IPv6)
MEF-8
MPLS
RTP
UDP (IPv4, IPv6)
MII
RMII
SSMII
16-Bit
32-Bit
SPI
0/0
See All TDM-Over-Packet (8)

Key Specifications:   Timing Card and Line Card ICs
Part Number Number of Independent DPLLs Number of Input Clocks Number of Differential Input Clocks Number of Output Clocks Number of Differential Output Clocks Input Clock Frequencies Output Clock Frequencies Number of DS1/E1/J1 Receivers Number of DS1/E1/J1 Transmitters Minimum DPLL Bandwidth (Hz) Maximum DPLL Bandwidth (Hz)
DS3100  2 14 2 11 3 2kHz and 4kHz
N x 19.44MHz
N x 8kHz up to 155.52MHz
N x DS1
N x E1
2kHz
6.48MHz
8kHz
25.00MHz
51.84MHz
62.5MHz
125.00MHz
155.52MHz
311.04MHz
DS3
E3
N x 19.44MHz
N x DS1
N x DS2
N x E1
2 2 0.0005 70
DS3101  2 14 2 11 3 2kHz and 4kHz
N x 19.44MHz
N x 8kHz up to 155.52MHz
N x DS1
N x E1
2kHz
6.48MHz
8kHz
25.00MHz
51.84MHz
62.5MHz
125.00MHz
155.52MHz
311.04MHz
DS3
E3
N x 19.44MHz
N x DS1
N x DS2
N x E1
0 0 0.0005 70
See All Timing Card and Line Card ICs (6)



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