ENGLISH 简体中文 日本語 한국어 

    Login | Register


   
 
Enter keywords or part number    





 
Overview

 


Product Families

 
Application Notes
 
New Product Announcements







Maxim > Solutions > Telecom Line Cards: T1, E1, J1

Single Chip Transceivers: Combination T1, E1, J1

DATA SHEETS
Display Title / Parts Key Advantages
QV  PDF Single/Dual/Quad/Octal TDM-Over-Packet Transport Devices
DS34S101, DS34S102, DS34S104, DS34S108

Smallest, Most Robust, Lowest Cost Choice for Delivering TDM Services Over Pseudowires
QV  PDF High-Precision Clock Generators with Integrated VCXO
MAX9450, MAX9451, MAX9452

First SONET Clock Generator with Integrated VCXO and Holdover for Replacing Expensive VCXOs and External Fail-Safe Logic
QV  PDF Ethernet Mapper with Integrated T1/E1/J1 Transceiver
DS33R11

QV  PDF Single T1/E1/J1 Transceiver
DS26521

Single-Port T1/E1/J1 Transceiver Is a Single-Chip Framer and LIU Combination for T1, E1, and J1 Applications
QV  PDF Quad Ethernet Mapper
DS33Z44

QV  PDF T1/E1/J1/64KCC BITS Element
DS26504

QV  PDF Inverse-Multiplexing Ethernet Mapper with Quad Integrated T1/E1/J1 Transceivers
DS33R41

Greatly Simplifies the Design of Applications for Transporting Ethernet Packets Over Up to Four T1 or E1 Lines
QV  PDF DS3/E3 Single-Chip Transceiver
DS3170

QV  PDF 4-Port Cell/Packet Over T1/E1/J1 Transceiver
DS26556

4-Port Cell/Packet Over T1/E1/J1 Single-Chip Transceiver
QV  PDF Quad T1/E1/J1 Transceivers
DS21455, DS21458

Industry's First 4-Port Transceivers to Switch Among All T1, E1, and J1 Standards without External Component Changes
QV  PDF T1/E1/J1 Single-Chip Transceiver TDM/UTOPIA II Interface
DS2156, DS2156L, DS2156LN

Industry's First T1/E1/J1 Transceiver for ATM Applications
QV  PDF Quad T1/E1/J1 Transceiver
DS21Q55, DS21Q55N

QV  PDF T1/E1/J1 Single-Chip Transceiver
DS2155

T1/E1/J1 Single-Chip Transceiver Provides Single Application Design for World-Wide Interoperability



Key Specifications:   Clock Generators
Part Number Applications fIN (min) (MHz) fIN (max) (MHz) fOUT (min) (MHz) fOUT (max) (MHz) Fixed or Continuous Frequency Output Levels Number of Outputs Number of PLLs Programmability Spread Spectrum Output Jitter (ps RMS) Supply Voltage (V) Package
MAX9451 
Ethernet
Fibre Channel
GSM
SONET/SDH
UMTS
W-CDMA
0.008 500 15 160 Continuous HSTL 2 1 I2C No 0.8 2.5
3.3
TQFP-EP/32
MAX9450 
Ethernet
Fibre Channel
GSM
SONET/SDH
UMTS
W-CDMA
0.008 500 15 160 Continuous LVPECL 2 1 I2C No 0.8 2.5
3.3
TQFP-EP/32
MAX9452 
Ethernet
Fibre Channel
GSM
SONET/SDH
UMTS
W-CDMA
0.008 500 15 160 Continuous LVDS 2 1 I2C No 0.8 2.5
3.3
TQFP-EP/32
See All Clock Generators (28)

Key Specifications:   High-Speed Interconnect (Differential Signaling)
Part Number Tx Signal Type Number of Tx Supply Voltage (V)
MAX9450  LVPECL 2 2.5
3.3
See All High-Speed Interconnect (Differential Signaling) (132)

Key Specifications:   T/E Carrier & Packetized Products
Part Number Transmission Standard Functions Number of Channels Input to Output Clocks (MHz) Supply Voltage (V) EV-Kit Package Smallest Available Package (max w/pins) (mm2)
DS26521  T1/E1/J1
Framer + LIU
1 External Master Clock can be a multiple of 1.544 or 2.048 3.3 Yes LQFP/64 149
DS33R11  Ethernet/Serial TDM
T1/E1/J1
Ethernet Mapper
1 1.544 to 4.096 & 8.192 3.3 Yes PBGA/256 729
DS33R41  Ethernet/Serial TDM
T1/E1/J1
Ethernet Mapper
4  -  3.3  -  PBGA/400 729
DS26556  T1/E1/J1
Framer + LIU
4 External Master Clock can be a multiple of 1.544 or 2.048 3.3  -  See Data Sheet  - 
DS33Z44  Ethernet/Serial TDM
Ethernet Mapper
4  -  3.3 Yes 0/0  - 
DS3170  T3/E3
Framer + LIU
1  -  3.3 Yes CSBGA/100 121
DS26504  64kHz - G.703 II.2 Japanese 6312kHz Clock
64kHz - G.703 II.1 Japanese 64kHz Clock
64kHz Composite Clock - G.703 Level B
64kHz Composite Clock - G.703 Level A
64kHz Composite Clock - GR378
T1/E1/J1
BITS Element
1 0.008
0.064
1.544
2.048
6.312
19.44
3.3 Yes LQFP/64 149
DS21455  T1/E1/J1
Framer + LIU
4  -  3.3  -  0/0  - 
DS21458  T1/E1/J1
Framer + LIU
4  -  3.3 Yes CSBGA/256 289
DS2156  T1/E1/J1
Framer + LIU
1 External Master Clock can be a multiple of 1.544 or 2.048 3.3 Yes CSBGA/100
LQFP/100
100
DS2155  T1/E1/J1
Framer + LIU
1  -  3.3 Yes CSBGA/100
LQFP/100
100
See All T/E Carrier & Packetized Products (102)

Key Specifications:   TDM-Over-Packet
Part Number Number of T1/E1/Serial Streams Number of T3/E3, STS-1 Serial Ports Mapping Methods PSN Encapsulation Protocols 10/100 MAC Interface Processor Interface Package
DS34S101  NEW! 1 1 AAL1
CESoPSN
HDLC
SAToP
Structured
Structured with CSA
TDMoIP
Unstructured
L2TPv3 (IPv4, IPv6)
MEF-8
MPLS
RTP
UDP (IPv4, IPv6)
MII
RMII
SSMII
16-Bit
32-Bit
SPI
0/0
DS34S102  NEW! 2 1 AAL1
CESoPSN
HDLC
SAToP
Structured
Structured with CSA
TDMoIP
Unstructured
L2TPv3 (IPv4, IPv6)
MEF-8
MPLS
RTP
UDP (IPv4, IPv6)
MII
RMII
SSMII
16-Bit
32-Bit
SPI
0/0
DS34S104  NEW! 4 1 AAL1
CESoPSN
HDLC
SAToP
Structured
Structured with CSA
TDMoIP
Unstructured
L2TPv3 (IPv4, IPv6)
MEF-8
MPLS
RTP
UDP (IPv4, IPv6)
MII
RMII
SSMII
16-Bit
32-Bit
SPI
0/0
DS34S108  NEW! 8 1 AAL1
CESoPSN
HDLC
SAToP
Structured
Structured with CSA
TDMoIP
Unstructured
L2TPv3 (IPv4, IPv6)
MEF-8
MPLS
RTP
UDP (IPv4, IPv6)
MII
RMII
SSMII
16-Bit
32-Bit
SPI
0/0
See All TDM-Over-Packet (8)



        •         •         •     Privacy Policy     •     Legal Notices

    Copyright © 2009 by Maxim Integrated Products