Network Hubs, Switches, and Routers



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Maxim > Solutions > Network Hubs, Switches, and Routers

Clock Recovery

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Key Advantages

QV PDF

Evaluation Kit for the DS34T101, DS34T102, DS34T104, DS34T108, DS34S101, DS34S102, DS34S104, and DS34S108
DS34T108DK

QV PDF

Single/Dual/Quad/Octal TDM-Over-Packet Chip
DS34T101, DS34T102, DS34T104, DS34T108

Supports CESoPSN, SAToP, and TDMoIP Transport Over a Packet-Switched Network for Up to 8 E1/T1 Ports

QV PDF

Stratum 2/3E/3 Timing Card IC
DS3101

SONET/SDH Stratum 3/3E Compliant Timing Card IC

QV PDF

Stratum 2/3E/3 Timing Card IC
DS3100

A Complete SONET/SDH Timing Card on a Single IC

QV PDF

50MHz to 122.88MHz VCXO
DS4077

QV PDF

Multiple-Output Network Clock Generator
MAX9489

Clock Generator Provides Multiple Clock Outputs Ideal for Network Routers

QV PDF

T1/E1/J1 BITS Element
DS26503

QV PDF

T1/E1/J1/64KCC BITS Element
DS26502

Industry's Only 64kHz Composite-Clock Transceivers

QV PDF

1:5 Differential (LV)PECL/(LV)ECL/HSTL Clock and Data Driver
MAX9316A

1:5 Differential (LV)PECL/(LV)ECL/HSTL Clock and Data Driver Designed for Clock and Data Distribution

QV PDF

Differential 5:1 or 4:1 ECL/PECL Multiplexers with Single/Dual Output Buffers
MAX9386, MAX9387, MAX9388

Industry's First 2.5GHz LVECL/LVPECL Multiplexers

QV PDF

4-Port LVDS and LVTTL-to-LVDS Repeaters
MAX9169, MAX9170

Lowest Pulse Skew, 4-Port, LVDS/LVTTL-to-LVDS Repeaters

QV PDF

One-to-Five LVPECL/LVCMOS Output Clock and Data Driver
MAX9324

QV PDF

Low-Power, Compact 2.5Gbps/2.7Gbps Clock-Recovery and Data-Retiming IC
MAX3873A

QV PDF

Quad T1/E1/J1 Transceiver
DS21Q55, DS21Q55N

QV PDF

622Mbps, 3.3V Clock-Recovery and Data-Retiming IC with Limiting Amplifier
MAX3676

High-Performance, Low-Power 622Mbps CDR

Key Specifications: Clock Generators

Part Number

Applications

f_IN (min) (MHz)

f_IN (max) (MHz)

f_OUT (min) (MHz)

f_OUT (max) (MHz)

Fixed or Continuous Frequency

Output Levels

Number of Outputs

Number of PLLs

Programmability

Spread Spectrum

Output Jitter (ps RMS)

Supply Voltage (V)

Package

MAX9489

•

Ethernet

•	General Purpose

133.3

Fixed

LVCMOS

I²C

3.3

TQFN/32

See All Clock Generators (28)

Key Specifications: Clock and Data Recovery

Part Number

Functions

Target Operating Range (Gbps)

Min. Data Rate (Mbps)

Max. Data Rate (Mbps)

Multirate

Supply Voltage (V)

Typ. Supply Current (mA)

I/O Type

Input Sens. (mV)

Package

Operating Temp. Range (°C)

MAX3873A

•

CDR

1 to 4.5

2488

2670

Yes

3.3

CML

QFN/20
TQFN/20

-40 to +85

MAX3676

•

CDR

622

3.3
5

PECL

TQFP/32

-40 to +85

See All Clock and Data Recovery (8)

Key Specifications: High-Speed Interconnect (Differential Signaling)

Part Number

Features

Rx Signal Type

Tx Signal Type

Functions

Number of Rx

Number of Tx

Data Rates (Mbps)

Propagation Delay (max) (ps)

Supply Voltage (V)

MAX9169

•	Fail-Safe Inputs

LVDS

•	Fan-Out Buffer

630

4200

3.3

MAX9170

•	Fail-Safe Inputs

LVCMOS
LVTTL

LVDS

•	Fan-Out Buffer

•	Level Translator

630

4200

3.3

MAX9316A

•	Fail-Safe Inputs

•	Selectable Single Ended or Differential Input

•	Synchronous Output Enable

ECL
HSTL
LVECL
LVPECL
PECL

ECL
LVECL
LVPECL
PECL

•	Fan-Out Buffer

520

3.3
5

MAX9386

•	Fail-Safe Inputs

ECL
LVECL
LVPECL
PECL

•	Multiplexer

431

3.3
5

MAX9387

•	Fail-Safe Inputs

ECL
LVECL
LVPECL
PECL

•	Multiplexer

431

3.3
5

MAX9388

•	Fail-Safe Inputs

ECL
LVECL
LVPECL
PECL

•	Multiplexer

431

3.3
5

MAX9324

•	Fail-Safe Inputs

•	Synchronous Output Enable

LVPECL

CMOS
LVPECL
LVTTL

•	Fan-Out Buffer

600

3.3

See All High-Speed Interconnect (Differential Signaling) (132)

Key Specifications: Oscillator Modules

Part Number

Frequency

Oscillator Type

Tuning Adjustment Type

Frequency Output Type

Freq. Stability vs. Temp. @-40 to +85°C (±ppm)

Frequency Stability vs. Supply Voltage (±ppm/V)

Frequency Stability vs. Aging (±ppm)

Supply Voltage (V)

DS4077

77.76MHz

Voltage

LVCMOS
LVDS

-3.5 to +11.5 (max)

10 (0-10 Years)

3.3 ±5%

See All Oscillator Modules (28)

Key Specifications: T/E Carrier & Packetized Design Kits

Part Number

Overview

Kit Product Line

Kit Hardware

Kit Software

Technical Documentation

DS34T108DK NEW!

TDM-over-Packet

•	BNC Cables (2)

•	BNC Converter (2)

•	Cat- 5 Crossover Cable

•	Cat- 5 Patch Cable

•	Design Kit Chassis

•	Power Cord

•	Chipview Configuration Software

•	Driver Source Code

•	Example Application Source Code

•	Data Sheet

•	User's Guide

See All T/E Carrier & Packetized Design Kits (16)

Key Specifications: T/E Carrier & Packetized Products

Part Number

Transmission Standard

Functions

Number of Channels

Input to Output Clocks (MHz)

Supply Voltage (V)

EV-Kit

Package

Smallest Available Package (max w/pins) (mm²)

DS26502

64kHz - G.703 II.2 Japanese 6312kHz Clock
64kHz - G.703 II.1 Japanese 64kHz Clock
64kHz Composite Clock - G.703 Level A
T1/E1/J1

•	BITS Element

0.064
1.544
2.048
6.312
19.44

3.3

Yes

LQFP/64

149

DS26503

T1/E1/J1

•	BITS Element

1.544
2.048
6.312

3.3

Yes

LQFP/64

149

See All T/E Carrier & Packetized Products (102)

Key Specifications: TDM-Over-Packet
Part Number	Number of Integrated T1/E1 LIU+Framer	Number of T1/E1/Serial Streams	Number of T3/E3, STS-1 Serial Ports	Mapping Methods	PSN Encapsulation Protocols	10/100 MAC Interface	Processor Interface	Package
DS34T101 NEW!	1	1	1	AAL1 CESoPSN HDLC SAToP Structured Structured with CSA TDMoIP Unstructured	L2TPv3 (IPv4, IPv6) MEF-8 MPLS RTP UDP (IPv4, IPv6)	MII RMII SSMII	16-Bit 32-Bit SPI	0/0
DS34T102 NEW!	2	2	1	AAL1 CESoPSN HDLC SAToP Structured Structured with CSA TDMoIP Unstructured	L2TPv3 (IPv4, IPv6) MEF-8 MPLS RTP UDP (IPv4, IPv6)	MII RMII SSMII	16-Bit 32-Bit SPI	0/0
DS34T104 NEW!	4	4	1	AAL1 CESoPSN HDLC SAToP Structured Structured with CSA TDMoIP Unstructured	L2TPv3 (IPv4, IPv6) MEF-8 MPLS RTP UDP (IPv4, IPv6)	MII RMII SSMII	16-Bit 32-Bit SPI	0/0
DS34T108 NEW!	8	8	1	AAL1 CESoPSN HDLC SAToP Structured Structured with CSA TDMoIP Unstructured	L2TPv3 (IPv4, IPv6) MEF-8 MPLS RTP UDP (IPv4, IPv6)	MII RMII SSMII	16-Bit 32-Bit SPI	0/0
See All TDM-Over-Packet (8)

Key Specifications: Timing Card and Line Card ICs
Part Number	Number of Independent DPLLs	Number of Input Clocks	Number of Differential Input Clocks	Number of Output Clocks	Number of Differential Output Clocks	Input Clock Frequencies	Output Clock Frequencies	Number of DS1/E1/J1 Receivers	Number of DS1/E1/J1 Transmitters	Minimum DPLL Bandwidth (Hz)	Maximum DPLL Bandwidth (Hz)
DS3100	2	14	2	11	3	2kHz and 4kHz N x 19.44MHz N x 8kHz up to 155.52MHz N x DS1 N x E1	2kHz 6.48MHz 8kHz 25.00MHz 51.84MHz 62.5MHz 125.00MHz 155.52MHz 311.04MHz DS3 E3 N x 19.44MHz N x DS1 N x DS2 N x E1	2	2	0.0005	70
DS3101	2	14	2	11	3	2kHz and 4kHz N x 19.44MHz N x 8kHz up to 155.52MHz N x DS1 N x E1	2kHz 6.48MHz 8kHz 25.00MHz 51.84MHz 62.5MHz 125.00MHz 155.52MHz 311.04MHz DS3 E3 N x 19.44MHz N x DS1 N x DS2 N x E1	0	0	0.0005	70
See All Timing Card and Line Card ICs (6)