The IETF PWE3 SAToP/CESoPSN/HDLC-compliant DS34S132 provides the interworking functions that are required for translating TDM data streams into and out of TDM-over-Packet (TDMoP) data streams for L2TPv3/IP, UDP/IP, MPLS (MFA-8), and Metro Ethernet (MEF-8) networks while meeting the jitter and wander timing performance that is required by the public network (ITU G.823, G.824, and G.8261). Up to 32 TDM ports can be translated into as many as 256 individually configurable pseudowires (PWs) for transmission over a 100/1000Mbps Ethernet port. Each TDM port's bit rate can vary from 64Kbps to 2.048Mbps to support T1/E1 or slower TDM rates. PW interworking for TDM-based serial HDLC data is also supported. A built-in time-slot assignment (TSA) circuit provides the ability to combine any group of time slots (TS) from a single TDM port into a single PW. The high level of integration provides the perfect solution for high-density applications to minimize cost, board space, and time to market.
Key Features
Applications/Uses
32 Independent TDM Ports with Serial Data, Clock, and Sync (Data = 64Kbps to 2.048Mbps)
One 100/1000Mbps (MII/GMII) Ethernet MAC
256 Total PWs, 32 PW per TDM Port, with Any Combination of TDMoP and/or HDLC PWs
PSN Protocols: L2TPv3 or UDP Over IP (IPv4 or IPv6), Metro Ethernet (MEF-8), or MPLS (MFA-8)
0, 1, or 2 VLAN Tags (IEEE 802.1Q)
Synchronous or Asynchronous TDM Port Timing
One Clock Recovery Engine per TDM Port with One Assignable as a Global Reference
Supported Clock Recovery Techniques
Adaptive Clock Recovery
Differential Clock Recovery
Absolute and Differential Timestamps
Independent Receive and Transmit Interfaces
Two Clock Inputs for Direct Transmit Timing
For Structured T1/E1, Each TDM Port Includes
DS0 TSA Block for any Time Slot to Any PW
32 HDLC/CES Engines (256 Total)
With or Without CAS Signaling
For Unstructured, each TDM Port Includes
One HDLC/SAT Engine (32 Total)
Any data rate from 64Kbps to 2.048Mbps
32-Bit or 16-Bit CPU Processor Bus
CPU-Based OAM and Signaling
UDP-specific "Special" Ethernet Type
Inband VCCV ARP
MEF OAM
Broadcast DA
NDP/IPv6
DDR SDRAM Interface
Low-Power 1.8V Core, 3.3V I/O, 2.5V SDRAM
HDLC-Encapsulated Data Over PSN
TDM Circuit Emulation Over PSN (TDM Leased-Line Services Over PSN, TDM Over BPON/GPON/EPON, TDM Over Cable, TDM Over Wireless, Cellular Backhaul, Multiservice Over Unified PSN)