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MAX3625A
Low-Jitter, Precision Clock Generator with Three Outputs

Can Obtain All Ethernet Frequencies from Low-Cost 25MHz Crystal Resonator


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Status
All versions are Not Recommended for New Designs. See Ordering Information for recommended replacements.

Description
FULL DATA SHEET (PDF, 312kB)
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The MAX3625A is a low-jitter, precision clock generator optimized for networking applications. The device integrates a crystal oscillator and a phase-locked loop (PLL) clock multiplier to generate high-frequency clock outputs for Ethernet, 10G Fibre Channel, and other networking applications.

Maxim's proprietary PLL design features ultra-low jitter and excellent power-supply noise rejection, minimizing design risk for network equipment.

The MAX3625A has three LVPECL outputs. Selectable output dividers and a selectable feedback divider allow a range of output frequencies.

Key Features   Applications/Uses
  • Crystal Oscillator Interface: 24.8MHz to 27MHz
  • CMOS Input: Up to 320MHz
  • Output Frequencies
    • Ethernet: 62.5MHz, 125MHz, 156.25MHz, 312.5MHz
    • 10G Fibre Channel: 159.375MHz, 318.75MHz
  • Low Jitter
    • 0.14psRMS (1.875MHz to 20MHz)
    • 0.36psRMS (12kHz to 20MHz)
  • Excellent Power-Supply Noise Rejection
  • No External Loop Filter Capacitor Required

 
  • Ethernet Networking Equipment
  • Fibre Channel Storage Area Network

Diagram
MAX3625A: Typical Operating Circuit
Typical Operating Circuit

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    Document Ref.: 19-4626; Rev 0; 2009-05-11
    This page last modified: 2009-08-06


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