QuickView - MAX3679 +3.3V, Low-Jitter Crystal to LVPECL Clock Generator


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Maxim > Products > [Clock Distribution] [Clock Generation]

MAX3679 +3.3V, Low-Jitter Crystal to LVPECL Clock Generator

Industry's Lowest Jitter PLL Clock Generator for Ethernet Applications

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Status

All versions are Not Recommended for New Designs. See Ordering Information for recommended replacements.

Description

FULL DATA SHEET (PDF, 396kB)

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The MAX3679 is a low-jitter precision clock generator with the integration of three LVPECL and one LVCMOS outputs optimized for Ethernet applications. The device integrates a crystal oscillator and a phase-locked loop (PLL) clock multiplier to generate high-frequency clock outputs for Ethernet applications.

Maxim's proprietary PLL design features ultra-low jitter (0.36ps_RMS) and excellent power-supply noise rejection, minimizing design risk for network equipment.

Key Features Applications/Uses

Crystal Oscillator Interface: 25MHz
CMOS Input: 25MHz
Output Frequencies for Ethernet

62.5MHz, 125MHz, 156.25MHz, 312.5MHz

Low Jitter

0.14ps_RMS (1.875MHz to 20MHz)
0.36ps_RMS (12kHz to 20MHz)

Excellent Power-Supply Noise Rejection
No External Loop Filter Capacitor Required

Ethernet Networking Equipment