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MAX19505
Dual-Channel, 8-Bit, 65Msps ADC

8-Bit, 65Msps Dual-Channel ADC Provides 49.8dBFS SNR and 69dBc SFDR at 43mW per Channel


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Status
Active: In Production.

Description
FULL DATA SHEET (PDF, 472kB)
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The MAX19505 dual-channel, analog-to-digital converter (ADC) provides 8-bit resolution and a maximum sample rate of 65Msps.

The MAX19505 analog input accepts a wide 0.4V to 1.4V input common-mode voltage range, allowing DC-coupled inputs for a wide range of RF, IF, and baseband front-end components. The MAX19505 provides excellent dynamic performance from baseband to high input frequencies beyond 400MHz, making the device ideal for zero-intermediate frequency (ZIF) and high-intermediate frequency (IF) sampling applications. The typical signal-to-noise ratio (SNR) performance is 49.8dBFS and typical spurious-free dynamic range (SFDR) is 69dBc at fIN = 70MHz and fCLK = 65MHz.

The MAX19505 operates from a 1.8V supply. Additionally, an integrated, self-sensing voltage regulator allows operation from a 2.5V to 3.3V supply (AVDD). The digital output drivers operate on an independent supply voltage (OVDD) over the 1.8V to 3.5V range. The analog power consumption is only 43mW per channel at VAVDD = 1.8V. In addition to low operating power, the MAX19505 consumes only 1mW in power-down mode and 15mW in standby mode.

Various adjustments and feature selections are available through programmable registers that are accessed through the 3-wire serial-port interface. Alternatively, the serial-port interface can be disabled, with the three pins available to select output mode, data format, and clock-divider mode. Data outputs are available through a dual parallel CMOS-compatible output data bus that can also be configured as a single multiplexed parallel CMOS bus.

The MAX19505 is available in a small 7mm x 7mm 48-pin thin QFN package and is specified over the -40°C to +85°C extended temperature range.

Refer to the MAX19515, MAX19516, and MAX19517 data sheets for pin- and feature-compatible 10-bit, 65Msps, 100Msps, and 130Msps versions, respectively. Refer to the MAX19506 and MAX19507 data sheets for pin- and feature-compatible 8-bit, 100Msps and 130Msps versions, respectively.

An evaluation kit is available:  MAX19505EVKIT, MAX19506EVKIT, MAX19507EVKIT, MAX19515EVKIT, MAX19516EVKIT, MAX19517EVKIT  

NOTE: This product requires use of the following:

  • MAX19505/06/07/15/16/17 EVKIT Software

    Key Features   Applications/Uses
    • Very-Low-Power Operation (43mW/Channel at 65Msps)
    • 1.8V or 2.5V to 3.3V Analog Supply
    • Excellent Dynamic Performance
      • 49.8dBFS SNR at 70MHz
      • 69dBc SFDR at 70MHz
    • User-Programmable Adjustments and Feature Selection through an SPI™ Interface
    • Selectable Data Bus (Dual CMOS or Single Multiplexed CMOS)
    • DCLK Output and Programmable Data Output Timing Simplifies High-Speed Digital Interface
    • Very Wide Input Common-Mode Voltage Range (0.4V to 1.4V)
    • Very High Analog Input Bandwidth (> 850MHz)
    • Single-Ended or Differential Analog Inputs
    • Single-Ended or Differential Clock Input
    • Divide-by-One (DIV1), Divide-by-Two (DIV2), and Divide-by-Four (DIV4) Clock Modes
    • Two's Complement, Gray Code, and Offset Binary Output Data Format
    • Out-of-Range Indicator (DOR)
    • CMOS Output Internal Termination Options (Programmable)
    • Reversible Bit Order (Programmable)
    • Data Output Test Patterns
    • Small, 7mm x 7mm 48-Pin Thin QFN Package with Exposed Pad

     
  • Digital Set-Top Boxes
  • IF and Baseband Communications, Including Cellular Base Stations and Point-to-Point Microwave Receivers
  • Portable Instrumentation and Low-Power Data Acquisition
  • Ultrasound and Medical Imaging

    Key Specifications:  High-Speed ADCs (> 5Msps)
    Part Number Input Chan. Features Resolution
    (bits)
    Sample Rate
    (Msps)
    AC Specs
    (MHz)
    SFDR
    (dBc)
    SINAD
    (dB)
    SNR
    (dB)
    THD
    (dB)
    INL
    (±LSB)
    DNL
    (±LSB)
    Full Pwr. BW
    (MHz)
    ICC
    (mA)
    Data Bus Interface Smallest Available Pckg.
    (mm2)
    Price
    max ≥ @ fIN min min min min typ max w/pins See Notes
    MAX19505  2
    DCLK Output Programmable Data Output Timing
    Selectable Data Bus
    8 65 70 77 49.3 49.8 -72 0 0.1 850 85 Selectable Dual/Mux'd CMOS 50 $4.10 @1k
    See All High-Speed ADCs (> 5Msps) (77)

    Diagram
    MAX19505: Functional Diagram
    Functional Diagram

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    Document Ref.: 19-4314; Rev 0; 2008-10-30
    This page last modified: 2009-08-12


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