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DS3102
Stratum 2/3E/3 Timing Card IC with Synchronous Ethernet Support

Low-Cost Timing Card IC with Full Synchronous Ethernet Clock Rate Support


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Status
Active: In Production.

Data Sheet
FULL DATA SHEET (PDF, 688kB)
Download this datasheet in PDF formatDownload   Send this datasheet to any email addressE-Mail


Errata
  • Errata DS3102 3102A2.pdf 
  • Description
    The DS3102 is a low-cost, feature-rich timing IC for telecom timing cards. With 8 input clocks, the device directly accepts both line timing from a large number of line cards and external timing from external DS1/E1 BITS transceivers. The DS3102 continually monitors all input clocks and performs automatic hitless reference switching if the primary reference fails. The T0 DPLL complies with the Stratum 2, 3E, 3, 4E and 4 requirements of GR-1244, GR-253, G.812 Types I–IV, G.813 and G.8262. The highly programmable DS3102 support numerous input and output frequencies including rates required for SONET/SDH, Synchronous Ethernet (1G, 10G, and 100Mbps), wireless base stations, and CMTS systems. PLL bandwidths from 0.5mHz to 400Hz are supported, and a wide variety of PLL characteristics and device features can be configured to meet the needs of many different applications. Two DS3102 devices can be configured in a master/slave arrangement for timing card equipment protection.

    The DS3102 register set is backward compatible with Semtech's ACS8522 timing card IC. The DS3102 has a different package and pin arrangement than the ACS8522.

    An evaluation kit is available:  DS3102DK  

    Key Features   Applications/Uses
    • Synchronization for Stratum 2, 3E, 3, 4E and 4 plus SMC, SEC and EEC
      • Meets Requirements of GR-1244 Stratum 2–4, GR-253, G.812 Types I–IV, G.813, and G.8262
      • Stratum 2, 3E or 3 Holdover Accuracy with Suitable External Oscillator
      • Programmable Bandwidth: 0.5mHz to 400Hz
      • Hitless Reference Switching on Loss of Input
      • Automatic or Manual Phase Build-Out
      • Frequency Conversion Among SONET/SDH, PDH, Ethernet, Wireless, and CMTS Rates
    • 8 Input Clocks
      • Four CMOS/TTL Inputs (≤ 125MHz)
      • Four LVDS/LVPECL/CMOS/TTL Inputs (≤ 156.25MHz)
      • Three Optional Frame-Sync Inputs (CMOS/TTL)
      • Continuous Input Clock Quality Monitoring
      • Numerous Input Clock Frequencies Supported:
        • SONET/SDH: 6.48, N x 19.44, N x 51.84MHz
        • Ethernet xMII: 2.5, 25, 125, 156.25MHz
        • PDH: N x DS1, N x E1, N x DS2, DS3, E3
        • Frame Sync: 2kHz, 4kHz, 8kHz
        • Custom: Any Multiple of 2kHz Up to 131.072MHz, Any Multiple of 8kHz Up to 155.52MHz
    • 7 Output Clocks
      • Three CMOS/TTL Outputs (≤ 125MHz)
      • Two LVDS/LVPECL Outputs (≤ 312.50MHz)
      • Two Dual CMOS/TTL and LVDS/LVPECL Outputs
      • Five CMOS Outputs Have Additional Output Pins That Can Be Powered at 2.5V or 3.3V
      • Numerous Output Clock Frequencies Supported:
        • SONET/SDH: 6.48, N x 19.44, N x 51.84MHz
        • Ethernet xMII: 2.5, 25, 125, 156.25, 312.5MHz
        • PDH: N x DS1, N x E1, N x DS2, DS3, E3
        • Other: 10, 10.24, 13, 30.72MHz
        • Frame Sync: 2kHz, 8kHz
        • Custom Clock Rates: Any Multiple of 2kHz Up to 77.76MHz, Any Multiple of 8kHz Up to 311.04MHz, Any Multiple of 10kHz Up to 388.79MHz
    • General
      • Internal Compensation for Master Clock Oscillator
      • SPI™ Processor Interface
      • 1.8V Operation with 3.3V I/O (5V Tolerant)
      • Industrial Temperature Range

     
  • SONET/SDH Equipment Clocks (SECs)
  • Synchronous Ethernet Equipment Clocks (EECs)
  • Timing Card IC in WAN Equipment Including MSPPs, Ethernet Switches, Routers, DSLAMs, and Wireless Base Stations

    Key Specifications:  Timing Card and Line Card ICs
    Part Number Indep. DPLLs Input Clocks Diff. Input Clocks Output Clocks Diff. Output Clocks fCLKIN fCLKOUT DS1/E1/J1 Rcvrs. DS1/E1/J1 Xmtrs. DPLL BW
    (Hz)
    DPLL BW
    (Hz)
    Smallest Available Pckg.
    (mm2)
    Price
    min max max w/pins See Notes
    DS3102  2 8 4 7 4
    2kHz and 4kHz
    25.00MHz
    125.00MHz
    156.25MHz
    312.5MHz
    N x 19.44MHz
    N x 2kHz up to 131.072MHz
    N x 8kHz up to 155.52MHz
    N x DS1
    N x E1
    2kHz
    6.48MHz
    8kHz
    25.00MHz
    51.84MHz
    62.5MHz
    125.00MHz
    155.52MHz
    156.25MHz
    311.04MHz
    312.5MHz
    DS3
    E3
    N x 10kHz up to 388.79MHz
    N x 19.44MHz
    N x 2kHz up to 77.76MHz
    N x 8kHz up to 311.04MHz
    N x DS1
    N x DS2
    N x E1
    0 0 0.0005 400 100 $35.20 @1k
    See All Timing Card and Line Card ICs (6)

    Diagram
    DS3102: Block Diagram
    Block Diagram

    Application Notes
  • Application Note 4391: Implement Master-Slave Timing-Card Redundancy Using Maxim Timing ICs - DS3102

    Evaluation Kits
  • DS3102DK

    Design Guides
  • Communications (PDF)

    Reliability Reports
  • Reliability Report: DS3102.pdf

    Software/Models
  • DS3102 Rev A2 Initialization Script
  • DS3102 BSDL Model
  • DS3102 IBIS Model

    Ordering Information
    Notes:

    1. Other options and links for purchasing parts are listed at: http://www.maxim-ic.com/sales.
    2. Didn't Find What You Need? Ask our applications engineers. Expert assistance in finding parts, usually within one business day.
    3. Part number suffixes: T or T&R = tape and reel;+ = RoHS/lead-free;# = RoHS/lead-exempt. More: SeeFull Data Sheet or Part Naming Conventions.
    4. * Some packages have variations, listed on the drawing. "PkgCode/Variation" tells which variation the product uses. Note that "+", "#", "-" in the part number suffix describes RoHS status. Package drawings may show a different suffix character.


    Devices: 1-2 of 2

    DS3102 Free
    Sample
    Buy Status
    Package: TYPE PINS FOOTPRINT
      DRAWING CODE/VAR *
    Temp RoHS/Lead-Free?
    Materials Analysis
    DS3102GN+  
    Active CSBGA;81 pin;100 mm²
    Outline Drawing: 21-0360 (PDF)
    Land Pattern: 90-0293 (PDF)
    Use pkgcode/variation: X81+1*
    -40°C to +85°C RoHS/Lead-Free: Lead Free
    Materials Analysis
    DS3102GN  
    Active CSBGA;81 pin;100 mm²
    Outline Drawing: 21-0360 (PDF)
    Land Pattern: 90-0293 (PDF)
    Use pkgcode/variation: X81-1*
    -40°C to +85°C RoHS/Lead-Free: No
    Materials Analysis

    More Information
  • New Product Press Release 2008-03-05 

    Related Products
    DS3100 Stratum 2/3E/3 Timing Card IC
    DS3106 Line Card Timing IC
    DS3104 Line Card Timing IC with Synchronous Ethernet Support
    DS3105 Line Card Timing IC

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    Document Ref.: 19-4617; 2008-11-11
    This page last modified: 2009-05-14


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