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DS3105
Line Card Timing IC

Low-Cost Line Card Timing IC with Synchronous Ethernet Support


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Data Sheet
FULL DATA SHEET (PDF, 596kB)
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Errata
  • Errata DS3105 3105A2.pdf 
  • Description
    The DS3105 is a low-cost, feature-rich timing IC for telecom line cards. Typically, the device accepts two reference clocks from dual redundant system timing cards. The DS3105 continually monitors both inputs and performs automatic hitless reference switching if the primary reference fails. The highly programmable DS3105 supports numerous input and output frequencies including frequencies required for SONET/SDH, Synchronous Ethernet (1G, 10G, and 100Mbps), wireless base stations, and CMTS systems. PLL bandwidths from 18Hz to 400Hz are supported, and a wide variety of PLL characteristics and device features can be configured to meet the needs of many different applications.

    The DS3105 register set is backward compatible with Semtech's ACS8525 line card timing IC. The DS3105 pinout is similar but not identical to the ACS8525.

    Key Features   Applications/Uses
    • Advanced DPLL Technology
      • Programmable PLL bandwidth: 18Hz to 400Hz
      • Hitless Reference Switching, Automatic or Manual
      • Holdover on Loss of All Input References
      • Frequency Conversion Among SONET/SDH, PDH, Ethernet, Wireless, and CMTS Rates
    • Five Input Clocks
      • Two CMOS/TTL (≤ 125MHz)
      • Two LVDS/LVPECL/CMOS/TTL (≤ 156.25MHz)
      • Backup Input (CMOS/TTL) in Case of Complete Loss of System Timing References
      • Three Optional Frame-Sync Inputs (CMOS/TTL)
      • Continuous Input Clock Quality Monitoring
      • Numerous Input Clock Frequencies Supported
        • Ethernet xMII: 2.5, 25, 125, 156.25MHz
        • SONET/SDH: 6.48, N x 19.44, N x 51.84MHz
        • PDH: N x DS1, N x E1, N x DS2, DS3, E3
        • Frame Sync: 2kHz, 4kHz, 8kHz
        • Custom: Any Multiple of 2kHz Up to 131.072MHz, Any Multiple of 8kHz Up to 155.52MHz
    • Two Output Clocks
      • One CMOS/TTL Output (≤ 125MHz)
      • One LVDS/LVPECL Output (≤ 312.50MHz)
      • Two Optional Frame-Sync Outputs: 2kHz, 8kHz
      • Numerous Output Clock Frequencies Supported
        • Ethernet xMII: 2.5, 25, 125, 156.25, 312.5MHz
        • SONET/SDH: 6.48, N x 19.44, N x 51.84MHz
        • PDH: N x DS1, N x E1, N x DS2, DS3, E3
        • Frame Sync: 2kHz, 8kHz
        • Other: 10, 10.24, 13, 30.72MHz
        • Custom Clock Rates: Any Multiple of 2kHz Up to 77.76MHz, Any Multiple of 8kHz Up to 311.04MHz, Any Multiple of 10kHz Up to 388.79MHz
    • General
      • Suitable Line Card IC for Stratum 3E/3/4, SMC, SEC
      • Internal Compensation for Master Clock Oscillator
      • SPI™ Processor Interface
      • 1.8V Operation with 3.3V I/O (5V Tolerant)
      • Industrial Operating Temperature Range

     
  • SONET/SDH, Synchronous Ethernet, PDH, and Other Line Cards in WAN Equipment Including MSPPs, Ethernet Switches, Routers, DSLAMs, and Wireless Base Stations

    Key Specifications:   Timing Card and Line Card ICs
    Part Number Number of Independent DPLLs Number of Input Clocks Number of Differential Input Clocks Number of Output Clocks Number of Differential Output Clocks Input Clock Frequencies Output Clock Frequencies Number of DS1/E1/J1 Receivers Number of DS1/E1/J1 Transmitters Minimum DPLL Bandwidth (Hz) Maximum DPLL Bandwidth (Hz) Smallest Available Package (max w/pins) (mm2) Price**
    DS3105  2 5 2 2 1 2kHz and 4kHz
    25.00MHz
    125.00MHz
    156.25MHz
    312.5MHz
    N x 19.44MHz
    N x 2kHz up to 131.072MHz
    N x 8kHz up to 155.52MHz
    N x DS1
    N x E1
    2kHz
    6.48MHz
    8kHz
    25.00MHz
    51.84MHz
    62.5MHz
    125.00MHz
    155.52MHz
    156.25MHz
    311.04MHz
    312.5MHz
    DS3
    E3
    N x 10kHz up to 388.79MHz
    N x 19.44MHz
    N x 2kHz up to 77.76MHz
    N x 8kHz up to 311.04MHz
    N x DS1
    N x DS2
    N x E1
    0 0 18 400 149 $30.40 @ 1k
    See All Timing Card and Line Card ICs (6)
    Notes:
    **This pricing is BUDGETARY, for comparing similar parts. Prices are in U.S. dollars and subject to change. Quantity pricing may vary substantially and international prices may differ due to local duties, taxes, fees, and exchange rates. For volume-specific prices and delivery, please see the price and availability page or contact an authorized distributor.

    Diagram
    DS3105: Typical Application Example
    Typical Application Example

    Application Notes
  • Application Note 4391: Implement Master-Slave Timing-Card Redundancy Using Maxim Timing ICs - DS3105

    Evaluation Kits
  • DS3105DK

    Design Guides
  • Communications (PDF)

    Reliability Reports
  • Reliability Report: DS3105.pdf

    Software/Models
  • DS3105 BSDL Model
  • DS3105 IBIS Model
  • DS3105_rev_A2_initialization_script

    Ordering Information
    Notes:

    1. Other options and links for purchasing parts are listed at: http://www.maxim-ic.com/sales.
    2. Didn't Find What You Need? Ask our applications engineers. Expert assistance in finding parts, usually within one business day.
    3. Part number suffixes: T or T&R = tape and reel; + = RoHS/lead-free; # = RoHS/lead-exempt. More: SeeFull Data Sheet or Part Naming Conventions.
    4. * Some packages have variations, listed on the drawing. "PkgCode/Variation" tells which variation the product uses. Note that "+", "#", "-" in the part number suffix describes RoHS status. Package drawings may show a different suffix character.


    Devices: 1-1 of 1

    DS3105 Free
    Sample
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    Package: TYPE PINS FOOTPRINT
      DRAWING CODE/VAR *
    Temp RoHS/Lead-Free?
    Materials Analysis
    DS3105LN+  
    LQFP;64 pin;149 mm²
    Outline Drawing: 21-0083 (PDF)
    Land Pattern: Not Available
    Use pkgcode/variation: C64L+1*
    -40°C to +85°C RoHS/Lead-Free: Lead Free
    Materials Analysis

    Related Products
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    DS3101 Stratum 2/3E/3 Timing Card IC
    DS3104 Line Card Timing IC with Synchronous Ethernet Support
    DS3105 Line Card Timing IC
    DS3102 Stratum 2/3E/3 Timing Card IC with Synchronous Ethernet Support

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    Document Ref.: 19-4628; 2009-05-12
    This page last modified: 2009-05-12


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