The MAX8794 DDR linear regulator sources and sinks up to 3A peak (typ) using internal n-channel MOSFETs. This linear regulator delivers an accurate 0.5V to 1.5V output from a low-voltage power input (VIN = 1.1V to 3.6V). The
MAX8794 uses a separate 3.3V bias supply to power the control circuitry and drive the internal n-channel MOSFETs.
The MAX8794 provides current and thermal limits to prevent damage to the linear regulator. Additionally, the MAX8794 generates a power-good (PGOOD) signal to
indicate that the output is in regulation. During startup, PGOOD remains low until the output is in regulation for 2ms (typ). The internal soft-start limits the input surge current.
The MAX8794 powers the active-DDR termination bus that requires a tracking input reference. The MAX8794 can also be used in low-power chipsets and graphics
processor cores that require dynamically adjustable output voltages. The MAX8794 is available in a 10-pin, 3mm x 3mm, TDFN package.
Key Features
Applications/Uses
Internal Power MOSFETs with Current Limit (3A typ)
Fast Load-Transient Response
External Reference Input with Reference Output Buffer
1.1V to 3.6V Power Input
±15mV (max) Load-Regulation Error
Thermal-Fault Protection
Shutdown Input
Power-Good Window Comparator with 2ms (typ) Delay
Small, Low-Profile, 10-Pin, 3mm x 3mm TDFN Package
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