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MAX4885
Complete VGA 1:2 or 2:1 Multiplexer


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Status
Active: In Production.

Description
FULL DATA SHEET (PDF, 304kB)
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The MAX4885 integrates high-bandwidth analog switches and level translating buffers to implement a complete 1:2 or 2:1 multiplexer for VGA signals. The device provides switching for RGB, display data channel (DDC), and horizontal and vertical synchronization (HSYNC, VSYNC) signals. A low-noise charge pump with internal capacitors provides a boosted gate-drive voltage to improve performance of the RGB switches.

In the 1:2 multiplexer mode, HSYNC/VSYNC inputs feature level-shifting buffers to support low voltage CMOS or standard TTL-compatible graphics controllers. In the 2:1 multiplexer mode, the output buffers for the HSYNC/VSYNC inputs are disabled, allowing bidirectional signaling. In both modes, DDC signals are voltage-clamped to an external voltage to provide level translation and protection. The MAX4885 features a 5µA shutdown mode and is ESD protected to ±8kV human body model (HBM) on externally routed pins.

The MAX4885 is specified over the extended (-40°C to +85°C) temperature range, and is available in the 32-pin, 5mm x 5mm TQFN package.

An evaluation kit is available:  MAX4885EVKIT  

Key Features   Applications/Uses
  • +5V Single-Supply Operation
  • Programmable Voltage Clamp for Open-Drain DDC Signals
  • Low 5Ω (typ) On-Resistance (R, G, B Signals)
  • Low 13pF (typ) On-Capacitance (R, G, B Signals)
  • Break-Before-Make Switching Protects Against Circuit Shorts
  • Low 300µA Supply Current (Lower than 1µA with Charge Pump Disabled)
  • Space-Saving, Lead-Free 32-Pin (5mm x 5mm) TQFN Package
 

Diagram
MAX4885: Typical Operating Circuit
Typical Operating Circuit

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    Document Ref.: 19-0554; Rev 0; 2006-05-22
    This page last modified: 2007-12-07


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