The MAX4885 integrates high-bandwidth analog switches and level translating buffers to implement a complete 1:2 or 2:1 multiplexer for VGA signals. The device provides switching for RGB, display data channel (DDC), and horizontal and vertical synchronization (HSYNC, VSYNC) signals. A low-noise charge pump with internal capacitors provides a boosted gate-drive voltage to improve performance of the RGB switches.
In the 1:2 multiplexer mode, HSYNC/VSYNC inputs feature level-shifting buffers to support low voltage CMOS or standard TTL-compatible graphics controllers. In the 2:1 multiplexer mode, the output buffers for the HSYNC/VSYNC inputs are disabled, allowing bidirectional signaling. In both modes, DDC signals are voltage-clamped to an external voltage to provide level translation and protection. The MAX4885 features a 5µA shutdown mode and is ESD protected to ±8kV human body model (HBM) on externally routed pins.
The MAX4885 is specified over the extended (-40°C to +85°C) temperature range, and is available in the 32-pin, 5mm x 5mm TQFN package.
* Some packages have variations, listed on the drawing. "PkgCode/Variation" tells which variation the product uses. Note that "+", "#", "-" in the part number suffix describes RoHS status. Package drawings may show a different suffix character.
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MAX4885
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TYPE PINS FOOTPRINT
DRAWING CODE/VAR *
Temp
RoHS/Lead-Free? Materials Analysis
MAX4885ETJ+
Active
TQFN;32 pin;26 mm²
Outline Drawing: 21-0140 (PDF)
Land Pattern: 90-0012 (PDF)
Use pkgcode/variation: T3255+4*
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