The MAX9251/MAX9253/MAX9255 serializers and the MAX9252 deserializer chipsets reduce wiring by serializing 22 bits onto a single differential pair. The 22 bits are serialized in each cycle of the parallel input clock, resulting in a 96Mbps to 384Mbps net serial-data rate which is ideal for cell-phone QVGA and QCIF displays. The MAX9251/MAX9253/MAX9255 serialize the 16-bit or 18-bit data/address plus additional control bits to reduce wiring through the hinge to the LCD controller. The 2-wire serial interface uses low-current differential signaling (LCDS) for low EMI, high common-mode noise immunity, and ground-shift tolerance. The MAX9251/MAX9253/MAX9255 serializers and the MAX9252 deserializer automatically identify the word boundary in serial data in case of signal interruption. The MAX9252's power-down is controlled by the MAX9251/MAX9253/MAX9255, and all the devices consume 3.5µA or less in power-down mode.
The MAX9251/MAX9253/MAX9255 serializers operate from a single +2.5V ±10% supply and accept +1.71V to +2.75V inputs. The MAX9252 deserializer operates from a +2.5V ±10% core supply and has a separate output buffer supply (VDDO), allowing +1.71V to +2.75V output high levels.
The MAX9251/MAX9253/MAX9255 and the MAX9252 are specified over the -40°C to +85°C extended temperature range, and are available in 28-pin TQFN (4mm x 4mm x 0.8mm) packages with an exposed paddle.
Key Features
Ideal for Serializing Cell-Phone LCD or Imager Parallel Interface
MAX9251/MAX9253/MAX9255 Serializes 16-Bit or 18-Bit Data/Address plus Additional Control Bits
LCDS Rejects Common-Mode Noise
Automatic Location of Word Boundary After Signal Interruption
Power-Down Control Through the Serial Link
Power-Down Supply Current
0.5µA (max) MAX9251/MAX9253/MAX9255
3.0µA (max) MAX9252
+2.5V ±10% Core Supply Voltage
Parallel I/O Interfaces Directly to 1.8V to 2.5V Logic
