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DS26522
Dual T1/E1/J1 Transceiver

Dual Transceiver Saves Board Space and Power


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Data Sheet
FULL DATA SHEET (PDF, 2.3MB)
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Errata
  • Errata DS26522 26522A1.pdf 
  • Application Notes
  • Application Note 301: Legacy T1/E1 8MHz Backplane Operation - DS26522
  • Application Note 309: Interfacing to the Fractional T1 and E1 - DS26522
  • Application Note 351: T1/E1 and T3/E3 Transformer Selection Guide - DS26522
  • Application Note 561: Tech Brief 7: DS2152 and DS2154 8MHz System Clock Operation - DS26522
  • Application Note 3894: DS26522 JTAG Scan Chain Mapping - DS26522
  • Application Note 3968: How to Use the Bit-Error-Rate Tester (BERT) on the DS2652x STCs - DS26522

    Evaluation Kits
  • DS26522DK

    Design Guides
  • Communications (PDF)

    Reliability Reports
  • Reliability Report: DS26522.pdf

    Software/Models
  • DS26522 IBIS Model
  • DS26522 Orcad Logical Symbol
  • DS26522 Logical Symbol-XML Format
  • DS26522 BSDL Model
  • DS26522 BSDL Model
  • DS26522 Gerber File

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    2008-02-19
    This page last modified: 2008-02-19


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