The MAX9225/MAX9226 serializer/deserializer chipset reduces wiring by serializing 10 bits onto a single differential pair. Ten bits are serialized in each cycle of the parallel input clock resulting in a 100Mbps to 200Mbps
net serial-data rate. The MAX9225 serializes the 8-bit YUV, HSYNC, and VSYNC outputs from a camera mounted in the flip part of the phone, reducing wiring through the hinge to the baseband processor in the base of the phone. The 2-wire serial interface uses low-current differential signaling (LCDS) for low EMI, high common-mode noise immunity, and ground-shift tolerance. The MAX9225/MAX9226 automatically identify the word boundary in the serial data in case of signal interruption. The MAX9226 power-down is controlled by the MAX9225. The MAX9225/MAX9226 consume 3.5µA or less in power-down mode.
The MAX9225 serializer operates from a single +2.375V to +3.465V supply and accepts +1.71V to +3.465V inputs. The MAX9226 deserializer operates from a
+2.375V to +3.465V core supply and has a separate output buffer supply (VDDO), allowing +1.71V to +3.465V output high levels.
The MAX9225/MAX9226 are specified over the -40°C to +85°C extended temperature range and are available in 16-pin TQFN (3mm x 3mm x 0.8mm) packages with an exposed paddle.
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