The DS33Z41 extends a 10/100 Ethernet LAN
segment by encapsulating MAC frames in HDLC or
X.86 (LAPS) for transmission over up to four
interleaved PDH/TDM data streams using robust,
balanced, and programmable inverse multiplexing.
The Interleave Bus (IBO) serial link supports
seamless bidirectional interconnection with Dallas
Semiconductor's T1/E1 framers and transceivers.
The device performs store-and-forward of packets
with full wire-speed transport capability. The built-in
Committed Information Rate (CIR) Controller
provides fractional bandwidth allocation up to the
line rate in increments of 512kbps.
* Some packages have variations, listed on the drawing. "PkgCode/Variation" tells which variation the product uses. Note that "+", "#", "-" in the part number suffix describes RoHS status. Package drawings may show a different suffix character.
Devices:
1-1 of 1
DS33Z41
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Status
Package:
TYPE PINS FOOTPRINT
DRAWING CODE/VAR *
Temp
RoHS/Lead-Free? Materials Analysis
DS33Z41
Active
CSBGA;169 pin;196 mm²
Outline Drawing: 21-0354 (PDF)
Land Pattern: 90-0335 (PDF)
Use pkgcode/variation: X169-1*
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