The DS33Z11 extends a 10/100 Ethernet LAN
segment by encapsulating MAC frames in HDLC or
X.86 (LAPS) for transmission over a PDH/TDM data
stream. The serial link supports bidirectional-synchronous
interconnect up to 52Mbps over xDSL,
T1/E1/J1, T3/E3, V.35/Optical, OC-1/EC-1, or
SONET/SDH Tributary.
The device performs store-and-forward of packets
with full wire-speed transport capability. The built-in
Committed Information Rate (CIR) controller
provides fractional bandwidth allocation up to the
line rate in increments of 512kbps. The DS33Z11
can operate with an inexpensive external processor,
EEPROM or in a stand-alone hardware mode.
* Some packages have variations, listed on the drawing. "PkgCode/Variation" tells which variation the product uses. Note that "+", "#", "-" in the part number suffix describes RoHS status. Package drawings may show a different suffix character.
Devices:
1-3 of 3
DS33Z11
Free Sample
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Status
Package:
TYPE PINS FOOTPRINT
DRAWING CODE/VAR *
Temp
RoHS/Lead-Free? Materials Analysis
DS33Z11+UNUSED
Active
CSBGA;169 pin;196 mm²
Outline Drawing: 21-0354 (PDF)
Land Pattern: 90-0335 (PDF)
Use pkgcode/variation: X169+1*
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