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Active: In Production.

Description

FULL DATA SHEET (PDF, 1.8MB) Download   E-Mail The DS33R41 extends a 10/100 Ethernet LAN segment by encapsulating MAC frames in HDLC or X.86 (LAPS) for transmission over four interleaved T1/E1/J1 lines using a robust, balanced, and programmable inverse multiplexing. Four integrated T1/E1/J1 transceivers provide framing and line interfacing functionality. The device performs store-and-forward of packets with full wire-speed transport capability. The built-in committed information rate (CIR) controller provides fractional bandwidth allocation up to the line rate in increments of 512kbps.

Key Features		Applications/Uses
10/100 IEEE 802.3 Ethernet MAC (MII and RMII) Half/Full Duplex with Automatic Flow Control Layer 1 Inverse Multiplexing Over Four T1/E1/J1 Lines Through the Integrated Framers and LIUs Supports Up to 7.75ms Differential Delay Aggregate Bandwidth from Up to Four T1/E1/J1 Links T1/E1 Signaling Capability for OAM HDLC/LAPS Encapsulation with Programmable FCS, Interframe Fill CIR Controller Provides Fractional Allocations in 512kbps Increments Programmable BERTs External 16MB, 100MHz SDRAM Buffering Parallel Microprocessor Interface 1.8V, 3.3V Power Supplies IEEE 1149.1 JTAG Support		Bonded Transparent LAN Service Ethernet Delivery Over T1/E1/J1 LAN Extension

Key Specifications:  T/E Carrier & Packetized Products
Part Number	Transmission Standard	Functions	Channels	VSUPPLY (V)	Package/Pins	Smallest Available Pckg. (mm2)	Price
						max w/pins	See Notes
DS33R41	Ethernet/Serial TDM T1/E1/J1	Ethernet Mapper	4	3.3	PBGA/400	729	$67.20 @1k
See All T/E Carrier & Packetized Products (102)

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2007-03-09
This page last modified: 2009-10-06