QuickView - DS26503 T1/E1/J1 BITS Element

Description

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The DS26503 is a building-integrated timing-supply (BITS) clock-recovery element. It also functions as a basic T1/E1 transceiver. The receiver portion can recover a clock from T1, E1, and 6312kHz synchronization timing interfaces. In T1 and E1 modes, the Synchronization Status Message (SSM) can also be recovered. The transmit portion can directly interface to T1 or E1 interfaces as well as source the SSM in T1 and E1 modes. The DS26503 can translate between any of the supported inbound synchronization clock rates to any supported outbound rate. A separate output is provided to source a 6312kHz clock. The device is controlled through a parallel, serial, or hardware controller port.

An evaluation kit is available: DS26503DK

Key Features

Applications/Uses

G.703 2048kHz Synchronization Interface Compliant
G.703 6312kHz Japanese Synchronization Interface Compliant
Interfaces to Standard T1/J1 (1.544MHz) and E1 (2.048MHz)
Interface to CMI-Coded T1/J1 and E1
Short- and Long-Haul Line Interface
Transmit and Receive T1 and E1 SSM Messages with Message Validation
T1/E1 Jitter Attenuator with Bypass Mode
Fully Independent Transmit and Receive Functionality
Internal Software-Selectable Receive- and Transmit-Side Termination for 75Ω/100Ω/110Ω/120Ω
Monitor Mode for Bridging Applications
Accepts 16.384MHz, 12.8MHz, 8.192MHz, 4.096MHz, 2.048MHz, or 1.544MHz Master Clock
8-Bit Parallel Control Port, Multiplexed or Nonmultiplexed, Intel or Motorola
Serial (SPI) Control Port
Hardware Control Mode
Provides LOS, AIS, and LOF Indications Through Hardware Output Pins
Fast Transmitter-Output Disable Through Device Pin for Protection Switching
IEEE® 1149.1 JTAG Boundary Scan
3.3V Supply with 5V-Tolerant Inputs and Outputs