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MAX1206
12-Bit, 40Msps ADC


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Description
FULL DATA SHEET (PDF, 616kB)
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The MAX1206 is a 3.3V, 12-bit analog-to-digital converter (ADC) featuring a fully differential wideband track-and-hold (T/H) input, driving the internal quantizer. The MAX1206 is optimized for low power, small size, and high dynamic performance. This ADC operates from a single 3.0V to 3.6V supply, consuming only 159mW, while delivering a typical signal-to-noise ratio (SNR) performance of 68.6dB at a 20MHz input frequency. The T/H-driven input stage accepts single-ended or differential inputs. In addition to low operating power, the MAX1206 features a 0.15mW power-down mode to conserve power during idle periods.

A flexible reference structure allows the MAX1206 to use its internal precision bandgap reference or accept an externally applied reference. A common-mode reference is provided to simplify design and reduce external component count in differential analog input circuits.

The MAX1206 supports both a single-ended and differential input clock drive. Wide variations in the clock duty cycle are compensated with the ADC's internal duty-cycle equalizer.

The MAX1206 features parallel, CMOS-compatible outputs. The digital output format is pin selectable to be either two's complement or Gray code. A data-valid indicator eliminates external components that are normally required for reliable digital interfacing. A separate power input for the digital outputs accepts a voltage from 1.7V to 3.6V for flexible interfacing with various logic levels. The MAX1206 is available in a 6mm x 6mm x 0.8mm, 40- pin thin QFN package with exposed paddle (EP), and is specified for the extended industrial (-40°C to +85°C) temperature range.

Refer to the MAX1209 and MAX1211 (see Pin-Compatible Higher/Speed Versions table) for applications that require high dynamic performance for IF input frequencies.

See a parametric table of the complete family of pin-compatible, 12-/14-bit high-speed ADCs.

Key Features   Applications/Uses
  • Excellent Dynamic Performance
    • 68.6dB SNR at fIN = 20MHz
    • 90dBc SFDR at fIN = 20MHz
  • Low-Power Operation
    • 159mW at 3.0V (Single-Ended Clock)
    • 181mW at 3.3V (Single-Ended Clock)
    • 198mW at 3.3V (Differential Clock)
  • Differential or Single-Ended Clock
  • Accepts 20% to 80% Clock Duty Cycle
  • Fully Differential or Single-Ended Analog Input
  • Adjustable Full-Scale Analog Input Range
  • Common-Mode Reference
  • Power-Down Mode
  • CMOS-Compatible Outputs in Two's Complement or Gray Code
  • Data-Valid Indicator Simplifies Digital Design
  • Out-of-Range and Data-Valid Indicators
  • Miniature, 40-Pin Thin QFN Package with Exposed Paddle
  • Pin-Compatible, IF Sampling ADC Available (MAX1211ETL)
  • Evaluation Kit Available (Order MAX1211EVKIT)

 
  • Communication Receivers Cellular, LMDS, Point-to-Point Microwave, MMDS, HFC, WLAN
  • Low-Power Data Acquisition
  • Portable Instrumentation
  • Ultrasound and Medical Imaging

    Key Specifications:   High-Speed ADCs (> 5Msps)
    Part Number Input Channels Resolution (Bits) Sample Rate (max) (Msps) Sample Rate (max) (Msps) AC Specs @ fIN (MHz) SFDR (dBc) SINAD (dB) SNR (dB) THD (db) INL (±LSB) DNL (±LSB) Smallest Available Package (max w/pins) (mm2)
    MAX1206  1 12 40 40 20 90 68.5 68.6 -88.4 0.3 0.3 37
    See All High-Speed ADCs (> 5Msps) (77)

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    Document Ref.: 19-3259; Rev 0; 2004-05-18
    This page last modified: 2008-03-06


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