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MAX5852
Dual, 8-Bit, 165Msps, Current-Output DAC


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Status
Active: In Production.

Description
FULL DATA SHEET (PDF, 1.3MB)
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The MAX5852 dual, 8-bit, 165Msps digital-to-analog converter (DAC) provides superior dynamic performance in wideband communication systems. The device integrates two 8-bit DAC cores, and a 1.24V reference. The MAX5852 supports single-ended and differential modes of operation. The dynamic performance is maintained over the entire 2.7V to 3.6V power-supply operating range. The analog outputs support a -1.0V to +1.25V compliance voltage.

The MAX5852 can operate in interleaved data mode to reduce the I/O pin count. This allows the converter to be updated on a single, 8-bit bus.

The MAX5852 features digital control of channel gain matching to within ±0.4dB in sixteen 0.05dB steps. Channel matching improves sideband suppression in analog quadrature modulation applications. The onchip 1.24V bandgap reference includes a control amplifier that allows external full-scale adjustments of both channels through a single resistor. The internal reference can be disabled and an external reference may be applied for high-accuracy applications.

The MAX5852 features full-scale current outputs of 2mA to 20mA and operates from a 2.7V to 3.6V single supply. The DAC supports three modes of power-control operation: normal, low-power standby, and complete power-down. In power-down mode, the operating current is reduced to 1µA.

The MAX5852 is packaged in a 40-pin thin QFN with exposed paddle (EP) and is specified for the extended (-40°C to +85°C) temperature range.

Pin-compatible, lower speed, and higher resolution versions are also available. Refer to the MAX5853 (10 bit, 80Msps), the MAX5851 (8 bit, 80Msps), and the MAX5854 (10 bit, 165Msps) data sheets for more information.

An evaluation kit is available:  MAX5852EVKIT  

Key Features   Applications/Uses
  • 8-Bit, 165Msps Dual DAC
  • Low Power
    • 190mW with IFS = 20mA at fCLK = 165MHz
  • 2.7V to 3.6V Single Supply
  • Full Output Swing and Dynamic Performance at 2.7V Supply
  • Superior Dynamic Performance
    • 67dBc SFDR at fOUT = 40MHz
  • Programmable Channel Gain Matching
  • Integrated 1.24V Low-Noise Bandgap Reference
  • Single-Resistor Gain Control
  • Interleaved Data Mode
  • Single-Ended and Differential Clock Input Modes
  • Miniature 40-Pin Thin QFN Package, 6mm x 6mm
  • EV Kit Available—MAX5852 EV Kit

 

Key Specifications:  High-Speed DACs
Part Number Resolution
(bits)
fCLK
(Msps)
Channels SFDR
(dBc)
THD
(dBc)
INL
(±LSB)
DNL
(±LSB)
PDISS
(mW)
Interface VSUPPLY
(V)
Price
@ fOUT @ fOUT See Notes
MAX5852  8 165 2 67 @ 10MHz -71 @ 10MHz 0.05 0.05 190 Parallel
3
3.3
$5.95 @1k
See All High-Speed DACs (43)

Diagram
MAX5852: Pin Configuration
Pin Configuration

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    Document Ref.: 19-3232; Rev 0; 2004-04-21
    This page last modified: 2009-10-07


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