QuickView - DS21455, DS21458 Quad T1/E1/J1 Transceivers

Description

FULL DATA SHEET (PDF, 1.8MB)
Download	E-Mail

The DS21455 and DS21458 are quad monolithic devices featuring independent transceivers that can be software configured for T1, E1, or J1 operation. Each is composed of a line interface unit (LIU), framer, HDLC controllers, and a TDM backplane interface, and is controlled via an 8-bit parallel port configured for Intel or Motorola bus operations. The DS21455* is a direct replacement for the older DS21Q55 quad MCM device. The DS21458, in a smaller package (17mm CSBGA) and featuring an improved controller interface, is software compatible with the older DS21Q55.

*The JTAG function on the DS21455/DS21458 is a single controller for all four transceivers, unlike the DS21Q55, which has a JTAG controller-per-transceiver architecture.

An evaluation kit is available: DS21458DK

Key Features

Applications/Uses

Four Independent Transceivers, Each Having the Following Features:

Complete T1 (DS1)/ISDN-PRI/J1 Transceiver Functionality
Complete E1 (CEPT) PCM-30/ISDN-PRI Transceiver Functionality
Short- and Long-Haul Line Interface for Clock/Data Recovery and Waveshaping
CMI Coder/Decoder
Crystal-Less Jitter Attenuator
Fully Independent Transmit and Receive Functionality
Dual HDLC Controllers
On-Chip Programmable BERT Generator and Detector
Internal Software-Selectable Receive- and Transmit-Side Termination Resistors for 75Ω/100Ω/120Ω T1 and E1 Interfaces
Dual Two-Frame Elastic-Store Slip Buffers that can Connect to Asynchronous Backplanes Up to 16.384MHz
16.384MHz, 8.192MHz, 4.096MHz, or 2.048MHz Clock Output Synthesized to Recovered Network Clock
Programmable Output Clocks for Fractional T1, E1, H0, and H12 Applications
Interleaving PCM Bus Operation
8-Bit Parallel Control Port, Multiplexed or Nonmultiplexed, Intel or Motorola
IEEE 1149.1 JTAG-Boundary Scan
3.3V Supply with 5V Tolerant Inputs and Outputs
DS21455 Directly Replaces DS21Q55
Signaling System 7 (SS7) Support
RAI-CI, AIS-CI Support