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MAX5854
Dual, 10-Bit, 165Msps, Current-Output DAC


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Status
Active: In Production.

Description
FULL DATA SHEET (PDF, 456kB)
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The MAX5854 dual, 10-bit, 165Msps digital-to-analog converter (DAC) provides superior dynamic performance in wideband communication systems. The device integrates two 10-bit DAC cores, and a 1.24V reference. The MAX5854 supports single-ended and differential modes of operation. The dynamic performance is maintained over the entire 2.7V to 3.6V power-supply operating range. The analog outputs support a -1.0V to +1.25V compliance voltage.

The MAX5854 can operate in interleaved data mode to reduce the I/O pin count. This allows the converter to be updated on a single, 10-bit bus.

The MAX5854 features digital control of channel gain matching to within ±0.4dB in sixteen 0.05dB steps. Channel matching improves sideband suppression in analog quadrature modulation applications. The on-chip 1.24V bandgap reference includes a control amplifier that allows external full-scale adjustments of both channels through a single resistor. The internal reference can be disabled and an external reference may be applied for high-accuracy applications.

The MAX5854 features full-scale current outputs of 2mA to 20mA and operates from a 2.7V to 3.6V single supply. The DAC supports three modes of power-control operation: normal, low-power standby, and complete power-down. In power-down mode, the operating current is reduced to 1µA.

The MAX5854 is packaged in a 40-pin thin QFN with exposed paddle (EP) and is specified for the extended (-40°C to +85°C) temperature range.

Pin-compatible, lower speed, and lower resolution versions are also available. Refer to the MAX5853 (10-bit, 80Msps), the MAX5852 (8-bit, 165Msps), and the MAX5851 (8-bit, 80Msps) data sheets for more information. See Table 4 at the end of the data sheet.

An evaluation kit is available:  MAX5854EVKIT  

Key Features   Applications/Uses
  • 10-Bit, 165Msps Dual DAC
  • Low Power
    • 190mW with IFS = 20mA at fCLK = 165MHz
  • 2.7V to 3.6V Single Supply
  • Full Output Swing and Dynamic Performance at 2.7V Supply
  • Superior Dynamic Performance
    • 73dBc SFDR at fOUT = 40MHz
    • UMTS ACLR = 65.5dB at fOUT = 30.7MHz
  • Programmable Channel Gain Matching
  • Integrated 1.24V Low-Noise Bandgap Reference
  • Single-Resistor Gain Control
  • Interleaved Data Mode
  • Single-Ended and Differential Clock Input Modes
  • Miniature 40-Pin Thin QFN Package, 6mm x 6mm
  • EV Kit Available—MAX5854 EV Kit

 
  • Communications
  • Direct Digital Synthesis (DDS)
  • Instrumentation/ATE
  • Point-to-Point Microwave Links
  • Quadrature Modulation
  • SatCom, LMDS, MMDS, HFC, DSL, WLAN,
  • Wireless Base Stations

    Key Specifications:  High-Speed DACs
    Part Number Resolution
    (bits)
    fCLK
    (Msps)
    Channels SFDR
    (dBc)
    THD
    (dBc)
    INL
    (±LSB)
    DNL
    (±LSB)
    PDISS
    (mW)
    Interface VSUPPLY
    (V)
    Price
    @ fOUT @ fOUT See Notes
    MAX5854  10 165 2 78 @ 10MHz -76 @ 10MHz 0.25 0.2 190 Parallel
    3
    3.3
    $7.45 @1k
    See All High-Speed DACs (43)

    Diagram
    MAX5854: Pin Configuration
    Pin Configuration

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    Document Ref.: 19-3197; Rev 0; 2004-02-17
    This page last modified: 2009-10-08


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