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MAX5858A
Dual, 10-Bit, 300Msps, DAC with 4x/2x/1x Interpolation Filters and PLL


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Description
FULL DATA SHEET (PDF, 920kB)
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The MAX5858A dual, 10-bit, 300Msps digital-to-analog converter (DAC) provides superior dynamic performance in wideband communication systems. The MAX5858A integrates two 10-bit DAC cores, 4x/2x/1x programmable digital interpolation filters, phase-lock loop (PLL) clock multiplier, and a 1.24V reference. The MAX5858A supports single-ended and differential modes of operation. The MAX5858A dynamic performance is maintained over the entire power-supply operating range of 2.7V to 3.3V. The analog outputs support a compliance voltage of -1.0V to +1.25V.

The 4x/2x/1x programmable interpolation filters feature excellent passband distortion and noise performance. Interpolating filters minimize the design complexity of analog reconstruction filters while lowering the data bus and the clock speeds of the digital interface. The PLL multiplier generates all internal, synchronized high-speed clock signals for interpolating filter operation and DAC core conversion. The internal PLL helps minimize system complexity and lower cost. To reduce the I/O pin count, the DAC can also operate in interleave data mode. This allows the MAX5858A to be updated on a single 10-bit bus.

The MAX5858A features digital control of channel gain matching to within ±0.4dB in sixteen 0.05dB steps. Channel matching improves sideband suppression in analog quadrature modulation applications. The on-chip 1.24V bandgap reference includes a control amplifier that allows external full-scale adjustments of both channels through a single resistor. The internal reference can be disabled and an external reference can be applied for high-accuracy applications.

The MAX5858A features full-scale current outputs of 2mA to 20mA and operates from a 2.7V to 3.3V single supply. The DAC supports three modes of power-control operation: normal, low-power standby, and complete power-down. In power-down mode, the operating current is reduced to 1µA.

The MAX5858A is packaged in a 48-pin TQFP with exposed paddle (EP) for enhanced thermal dissipation and is specified for the extended (-40°C to +85°C) operating temperature range.

Key Features   Applications/Uses
  • 10-Bit Resolution, Dual DAC
  • 300Msps Update Rate
  • Integrated 4x/2x/1x Interpolating Filters
  • Internal PLL Multiplier
  • 2.7V to 3.3V Single Supply
  • Full Output Swing and Dynamic Performance at 2.7V Supply
  • Superior Dynamic Performance
    • 73dBc SFDR at fOUT = 20MHz
    • UMTS ACLR = 63dB at fOUT = 30.7MHz
  • Programmable Channel Gain Matching
  • Integrated 1.24V Low-Noise Bandgap Reference
  • Single-Resistor Gain Control
  • Interleave Data Mode
  • Differential Clock Input Modes
  • EV Kit Available—MAX5858AEVKit

 
  • Communications
  • Direct Digital Synthesis (DDS)
  • Instrumentation/ATE
  • Point-to-Point Microwave Links
  • SatCom, LMDS, MMDS, HFC, DSL, WLAN,
  • Wireless Base Stations

    Key Specifications:   High-Speed DACs
    Part Number Features Resolution (Bits) fCLK (Msps) Number of Channels SFDR @ fOUT (dBc) THD@fOUT (dBc) INL (±LSB) DNL (±LSB) PDISS (mW) Interface Supply Voltage (V) EV-Kit RoHS Available Package Smallest Available Package (max w/pins) (mm2) Price**
    MAX5858A 
    Interpolation Filter
    PLL
    10 300 2 73 @ 20MHz -72 @ 5MHz 0.5 0.25 438 Parallel 3 Yes Yes TQFP/48 83 $9.85 @ 1k
    See All High-Speed DACs (44)
    Notes:
    **This pricing is BUDGETARY, for comparing similar parts. Prices are in U.S. dollars and subject to change. Quantity pricing may vary substantially and international prices may differ due to local duties, taxes, fees, and exchange rates. For volume-specific prices and delivery, please see the price and availability page or contact an authorized distributor.

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    Document Ref.: 19-2999; Rev 0; 2003-11-11
    This page last modified: 2007-08-21




             


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