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DS26524
Quad T1/E1/J1 Transceiver

Low-Power, Low-Cost SCT Pin and Software Compatible with the Octal DS26528 and Makes Migration to Higher Ports Easy, Available in Lead-Free Packages


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Description
FULL DATA SHEET (PDF, 2.4MB)
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The DS26524 is a single-chip 4-port framer and line interface unit (LIU) combination for T1, E1, and J1 applications. Each channel is independently configurable, supporting both long-haul and short-haul lines.

Key Features   Applications/Uses
  • Four Complete T1, E1, or J1 Long-Haul/Short-Haul Transceivers (LIU plus Framer)
  • Independent T1, E1, or J1 Selections for Each Transceiver
  • Internal Software-Selectable Transmit- and Receive-Side Termination for 100Ω T1 Twisted Pair, 110Ω J1 Twisted Pair, 120Ω E1 Twisted Pair, and 75Ω E1 Coaxial Applications
  • Crystal-Less Jitter Attenuator can be Selected for Transmit or Receive Path; Jitter Attenuator Meets ETS CTR 12/13, ITU-T G.736, G.742, G.823, and AT&T Pub 62411
  • External Master Clock can be Multiple of 2.048MHz or 1.544MHz for T1/J1 or E1 Operation; This Clock is Internally Adapted for T1 or E1 Usage in the Host Mode
  • Receive-Signal Level Indication from -2.5dB to -36dB in T1 Mode and -2.5dB to -44dB in E1 Mode in Approximate 2.5dB Increments
  • Transmit Open- and Short-Circuit Detection
  • LIU LOS in Accordance with G.775, ETS 300 233, and T1.231
  • Transmit Synchronizer
  • Flexible Signaling Extraction and Insertion Using Either the System Interface or Microprocessor Port
  • Alarm Detection and Insertion
  • T1 Framing Formats of D4, SLC-96, and ESF
  • J1 Support
  • E1 G.704 and CRC-4 Multiframe
  • T1-to-E1 Conversion

 
  • Channel Banks
  • Channel Service Units (CSUs)
  • Data Service Units (DSUs)
  • Muxes
  • Routers
  • Switches
  • T1/E1 Test Equipment

    Diagram
    DS26524: Typical Operating Circuit
    Typical Operating Circuit

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    Document Ref.: xxxx; 2007-12-05
    This page last modified: 2007-12-05




             


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