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MAX9178
Quad LVDS Line Driver with High-ESD Tolerance and Flow-Through Pinout

Industry's First Quad LVDS Driver with Automatic Detection Outputs


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Description
FULL DATA SHEET (PDF, 316kB)
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The MAX9178 quad low-voltage differential signaling (LVDS) line driver with high-ESD tolerance is ideal for applications requiring high data rates and low power with reduced noise. The MAX9178 is guaranteed to transmit data at speeds up to 400Mbps (200MHz) over controlled impedance of media of approximately 100Ω. The transmission media can be printed circuit (PC) board traces, backplanes, or cables.

The MAX9178 accepts four LVTTL/LVCMOS inputs and translates them to LVDS output signals. All inputs tolerate overshoot of VCC +1V and undershoot of -1V. The EN and active-low EN inputs are ANDed together and control the high-impedance outputs. When the device is disabled, power drops to ultra-low 12.6mW (typ). Outputs conform to the ANSI TIA/EIA-644 LVDS standard.

The MAX9178 operates from a single +3.3V supply, and is available in a 16-pin TSSOP and 16-pin thin QFN package with exposed pad. The MAX9178 is specified for operation from -40°C to +85°C.

Key Features   Applications/Uses
  • Flow-Through Pinout
    • Simplifies PC Board Layout
    • Reduces Crosstalk
  • Pin Compatible with DS90LV047A and MAX9123
  • Guaranteed 400Mbps Data Rate
  • Single-Ended Inputs Tolerate 1V Overshoot/Undershoot
  • 250ps Maximum Pulse Skew
  • IEC 61000-4-2 Level 4 ESD Tolerance on LVDS Outputs
  • Conforms to ANSI TIA/EIA-644 LVDS Standard
  • Single +3.3V Supply

 
  • Add/Drop Multiplexers
  • Backplane Interconnect
  • Cell Phone Base Stations
  • Clock Distribution
  • Digital Copiers
  • Digital Cross-Connects
  • DSLAM Backplane
  • Laser Printers
  • Network Routers and Switches

    Key Specifications:   High-Speed Interconnect (Differential Signaling)
    Part Number Features Rx Signal Type Tx Signal Type Functions Number of Rx Number of Tx Data Rates (Mbps) Propagation Delay (max) (ps) Supply Voltage (V) Pulse Skew (max) (ps) Channel-to-Channel Skew (max) (ps) Output Transition Time (max) (ps) ESD Protection (±kV) Package Smallest Available Package (max w/pins) (mm2)
    MAX9178 
    Fail-Safe Inputs
    Flow-Through Pinout
    Guaranteed Min. Output Short-Pulse Duration
    Pin-Programmable Configuration
    CMOS
    LVTTL
    LVDS
    Level Translator
    4 4 400 2000 3.3 250 350 700 15 THIN QFN/16
    TSSOP/16
    17
    See All High-Speed Interconnect (Differential Signaling) (131)

    Diagram
    MAX9178: Typical Application Circuit
    Typical Application Circuit

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    Document Ref.: 19-2856; Rev 0; 2003-05-15
    This page last modified: 2008-03-13




             


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