The MAX9322 low-skew 1:15 differential clock driver
reproduces or divides one of two differential input clocks
at 15 differential outputs. An input multiplexer selects from
one of two input clocks with input switching frequency in
excess of 1.0GHz. The 15 outputs are arranged in four
banks with 2, 3, 4, and 6 outputs, respectively. Each
output bank is individually programmable to provide a
divide-by-1 or divide-by-2 frequency function.
The MAX9322 operates in LVPECL systems with a
+2.375V to +3.8V supply or in LVECL systems with a
-2.375V to -3.8V supply. A VBB reference output provides
compatibility with single-ended clock input signals
and a master reset input provides a simultaneous
reset on all outputs.
The MAX9322 is available in 52-pin TQFP and 68-pin
QFN packages and is specified for operation over
-40°C to +85°C. For 1:10 clock drivers, refer to the
MAX9311/MAX9313 data sheet. For 1:5 clock drivers,
refer to the MAX9316 data sheet.
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