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Maxim > Products > [Interface and Interconnect]  [Optoelectronics]  [Timekeeping, Timers, and Counters]  [Clock Distribution] 
MAX9322
LVECL/LVPECL 1:15 Differential Divide-by-1/Divide-by-2 Clock Driver

1:15 Divide-by-1, Divide-by-2 Differential LVPECL Clock Driver


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Status
Active: In Production.

Data Sheet
FULL DATA SHEET (PDF, 196kB)
Download this datasheet in PDF formatDownload   Send this datasheet to any email addressE-Mail

Description
The MAX9322 low-skew 1:15 differential clock driver reproduces or divides one of two differential input clocks at 15 differential outputs. An input multiplexer selects from one of two input clocks with input switching frequency in excess of 1.0GHz. The 15 outputs are arranged in four banks with 2, 3, 4, and 6 outputs, respectively. Each output bank is individually programmable to provide a divide-by-1 or divide-by-2 frequency function.

The MAX9322 operates in LVPECL systems with a +2.375V to +3.8V supply or in LVECL systems with a -2.375V to -3.8V supply. A VBB reference output provides compatibility with single-ended clock input signals and a master reset input provides a simultaneous reset on all outputs.

The MAX9322 is available in 52-pin TQFP and 68-pin QFN packages and is specified for operation over -40°C to +85°C. For 1:10 clock drivers, refer to the MAX9311/MAX9313 data sheet. For 1:5 clock drivers, refer to the MAX9316 data sheet.

Key Features   Applications/Uses
  • 1.2ps (RMS) Maximum Random Jitter
  • 300mV Differential Output at 1.0GHz
  • 900ps Propagation Delay
  • Selectable Divide-by-1 or Divide-by-2 Frequency Outputs
  • Multiplexed 2:1 Input Function
  • LVECL Operation from VEE = -2.375V to -3.8V
  • LVPECL Operation from VCC = +2.375V to +3.8V
  • ESD Protection: > 2kV Human Body Model

 
  		• Automated Test Equipment (ATE)
  		• Central Office Backplane Clock Distribution
  		• DSLAM Backplane
  		• Low-Jitter Data Repeater
  		• Precision Clock Distribution
  		• Wireless Base Stations

    Key Specifications:  High-Speed Interconnect (Differential Signaling)
    Part Number Features Signal Type Signal Type Functions Rx Tx tPD
    (ps)    		 VSUPPLY
    (V)
    Rx Tx max
    MAX9322 
    Differential Input Mux
    Divide-by-1 or Divide-by-2 Outputs
    HSTL
    LVECL
    LVPECL
    LVECL
    LVPECL
    		 Fan-Out Buffer 2 15 1225 3.3
    See All High-Speed Interconnect (Differential Signaling) (132)

    Diagram
    MAX9322: Typical Operating Circuit
    Typical Operating Circuit

    Application Notes
  		• Application Note 1752: Applying HSTL Signals to PECL Input Devices - MAX9322
  		• Application Note 1916: An Introduction to Jitter in Communications Systems - MAX9322

    Design Guides
  		• Fiber (PDF)
  		• Communications (PDF)

    Reliability Reports
  		• Request Reliability Report for:

    Software/Models
  		• MAX9322 IBIS Model

    Ordering Information
    Notes:

    1. Other options and links for purchasing parts are listed at: http://www.maxim-ic.com/sales.
    2. Didn't Find What You Need? Ask our applications engineers. Expert assistance in finding parts, usually within one business day.
    3. Part number suffixes: T or T&R = tape and reel;+ = RoHS/lead-free;# = RoHS/lead-exempt. More: SeeFull Data Sheet or Part Naming Conventions.
    4. * Some packages have variations, listed on the drawing. "PkgCode/Variation" tells which variation the product uses. Note that "+", "#", "-" in the part number suffix describes RoHS status. Package drawings may show a different suffix character.


    Devices: 1-4 of 4

    MAX9322 Free
    Sample    		 Buy Status
    Package: TYPE PINS FOOTPRINT
      DRAWING CODE/VAR *
    		Temp RoHS/Lead-Free?
    Materials Analysis
    MAX9322ECY+TD    
    		Active TQFP;52 pin;149 mm²
    Outline Drawing: 21-0427 (PDF)
    Land Pattern: 90-0160 (PDF)
    Use pkgcode/variation: C52+1*
    		-40°C to +85°C RoHS/Lead-Free: Lead Free
    Materials Analysis
    MAX9322ECY+D    
    		Active TQFP;52 pin;149 mm²
    Outline Drawing: 21-0427 (PDF)
    Land Pattern: 90-0160 (PDF)
    Use pkgcode/variation: C52+1*
    		-40°C to +85°C RoHS/Lead-Free: Lead Free
    Materials Analysis
    MAX9322ECY-D    
    		Active TQFP;52 pin;149 mm²
    Outline Drawing: 21-0427 (PDF)
    Land Pattern: 90-0160 (PDF)
    Use pkgcode/variation: C52-1*
    		-40°C to +85°C RoHS/Lead-Free: No
    Materials Analysis
    MAX9322ECY-TD    
    		Active

    Land Pattern: Not Available

    		-40°C to +85°C See data sheet

    More Information
  		• New Product Press Release 2002-10-04 

    Related Products
    MAX9315 1:5 Differential LVPECL/LVECL/HSTL Clock and Data Driver
    MAX9316 1:5 Differential LVPECL/LVECL/HSTL Clock and Data Driver
    MAX9325 2:8 Differential LVPECL/LVECL/HSTL Clock and Data Driver
    MAX9326 1:9 Differential LVPECL/LVECL/HSTL Clock and Data Driver
    MAX9311, MAX9313 1:10 Differential LVPECL/LVECL/HSTL Clock and Data Drivers
    MAX9312, MAX9314 Dual 1:5 Differential LVPECL/LVECL/HSTL Clock and Data Drivers

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    Document Ref.: 19-2544; Rev 2; 2007-02-16
    This page last modified: 2007-07-13


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