The MAX9156 is an LVPECL-to-LVDS level translator that accepts a single LVPECL input and translates it to a single LVDS output. It is ideal for interfacing between LVPECL and LVDS interfaces in systems that require minimum jitter, noise, power, and space.
Ultra-low, 23psP-P added deterministic jitter and 0.6psRMS added random jitter ensure reliable communication in high-speed links that are highly sensitive to timing errors, especially those incorporating clock-and-data recovery, PLLs, serializers, or deserializers. The MAX9156's switching performance guarantees a 200Mbps data rate, but minimizes radiated noise by guaranteeing 0.5ns minimum output transition time.
The MAX9156 operates from a single +3.3V supply and consumes only 10mA supply current over a -40°C to +85°C temperature range. It is available in a tiny 6-pin SC70 package (half the size of a SOT23). Refer to the MAX9155 data sheet for a low-jitter, low-noise LVDS repeater in an SC70 package.
Key Features
Applications/Uses
Tiny SC70 Package
Ultra-Low Jitter
23psP-P Added Deterministic Jitter
(223-1 PRBS)
0.6psRMS Added Random Jitter
0.5ns (min) Transition Time Minimizes Radiated Noise
200Mbps Guaranteed Data Rate
Low 10mA Supply Current
Output Conforms to ANSI/EIA/TIA-644 LVDS Standard
High-Impedance Inputs and Outputs in
Power-Down Mode
* Some packages have variations, listed on the drawing. "PkgCode/Variation" tells which variation the product uses. Note that "+", "#", "-" in the part number suffix describes RoHS status. Package drawings may show a different suffix character.
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