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MAX9156
Low-Jitter, Low-Noise LVPECL-to-LVDS Level Translator in an SC70 Package


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Status
Active: In Production.

Description
FULL DATA SHEET (PDF, 156kB)
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The MAX9156 is an LVPECL-to-LVDS level translator that accepts a single LVPECL input and translates it to a single LVDS output. It is ideal for interfacing between LVPECL and LVDS interfaces in systems that require minimum jitter, noise, power, and space.

Ultra-low, 23psP-P added deterministic jitter and 0.6psRMS added random jitter ensure reliable communication in high-speed links that are highly sensitive to timing errors, especially those incorporating clock-and-data recovery, PLLs, serializers, or deserializers. The MAX9156's switching performance guarantees a 200Mbps data rate, but minimizes radiated noise by guaranteeing 0.5ns minimum output transition time.

The MAX9156 operates from a single +3.3V supply and consumes only 10mA supply current over a -40°C to +85°C temperature range. It is available in a tiny 6-pin SC70 package (half the size of a SOT23). Refer to the MAX9155 data sheet for a low-jitter, low-noise LVDS repeater in an SC70 package.

Key Features   Applications/Uses
  • Tiny SC70 Package
  • Ultra-Low Jitter
    • 23psP-P Added Deterministic Jitter (223-1 PRBS)
    • 0.6psRMS Added Random Jitter
  • 0.5ns (min) Transition Time Minimizes Radiated Noise
  • 200Mbps Guaranteed Data Rate
  • Low 10mA Supply Current
  • Output Conforms to ANSI/EIA/TIA-644 LVDS Standard
  • High-Impedance Inputs and Outputs in Power-Down Mode

 
  • Add/Drop Multiplexers
  • Cell Phone Base Stations
  • Digital Cross-Connects
  • DSLAM
  • Multidrop Buses
  • Network Routers and Switches

    Diagram
    MAX9156: Typical Operating Circuit
    Typical Operating Circuit

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    Document Ref.: 19-2216; Rev 0; 2001-11-21
    This page last modified: 2009-01-27


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