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Status

Active: In Production.

Description

FULL DATA SHEET (PDF, 204kB) Download   E-Mail The MAX3670 is a low-jitter 155MHz/622MHz reference clock generator IC designed for system clock distribution and frequency synchronization in OC-48 and OC-192 SONET/SDH and WDM transmission systems. The MAX3670 integrates a phase/frequency detector, an operational amplifier (op amp), prescaler dividers and input/output buffers. Using an external VCO, the MAX3670 can be configured easily as a phase-lock loop with bandwidth programmable from 15Hz to 20kHz. The MAX3670 operates from a single +3.3V or +5.0V supply, and dissipates 150mW (typ) at 3.3V. The operating temperature range is from -40°C to +85°C. The chip is available in a 5mm x 5mm, 32-pin QFN package.

An evaluation kit is available:  MAX3670EVKIT  

Key Features		Applications/Uses
Single +3.3V or +5.0V Supply Power Dissipation: 150mW at +3.3V Supply External VCO Center Frequencies (fVCO): 155MHz to 670MHz Reference Clock Frequencies: fVCO, fVCO/2, fVCO/8 Main Clock Output Frequency: fVCO Optional Output Clock Frequencies: fVCO, fVCO/2, fVCO/4, fVCO/8 Low Intrinsic Jitter: <0.4psRMS Loss-of-Lock Indicator PECL Clock Output Interface		Clock Jitter Clean-Up and Frequency Synchronization Frequency Conversion OC-12 to OC-192 SONET/WDM Transport Systems System Clock Distribution

Key Specifications:  Clock Generators

Part Number

Applications

fIN (MHz)

fIN (MHz)

fOUT (MHz)

fOUT (MHz)

Fixed or Continuous Frequency

Output Levels

Out- puts

PLLs

Program- mability

Spread Spectrum

Output Jitter (ps)

VSUPPLY (V)

Package/Pins

Price

min

max

min

max

RMS

See Notes

MAX3670

SONET/SDH

0

155

0

670

Continuous

LVPECL

2

1

Pin

No

0.2

3.3 5

QFN/32 TQFN/32

$14.60 @1k

See All Clock Generators (27)

Diagram

Minimal Operating Circuit

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Document Ref.: 19-2166; Rev 2; 2009-09-30
This page last modified: 2009-09-30