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Data Sheet

FULL DATA SHEET (PDF, 1.1MB) Download   E-Mail

Errata

Errata DS21Q48 2148_Q48C1.pdf  Errata DS2148 2148_Q48C1.pdf  Errata DS2148 2148_Q48A2.pdf  Errata DS21Q48 2148_Q48A2.pdf

Application Notes

Application Note 324: T1/E1 Network Interface Design - DS2148, DS2148, DS21Q48 Application Note 351: T1/E1 and T3/E3 Transformer Selection Guide - DS2148, DS21Q48 Application Note 370: Using RCLK in a BITS/SSU Application - DS2148 Application Note 382: J1 Japanese Standards - DS2148, DS21Q48 Application Note 387: Using DS2148/348 as Repeater - DS2148 Application Note 388: Hitless Protection Switching with 1+1 Redundancy - DS2148 Application Note 402: Additional Pulse Amplitude Settings for DS2148, DS21348, DS21Q48, DS21Q348 and DS21448 - DS2148, DS21Q48 Application Note 405: Power-Fault Protection Layout - DS2148, DS2148, DS21Q48 Application Note 407: DS2148/DS21348 Hardware Mode - DS2148 Application Note 590: Maxim® Telecommunications Frequently Asked Questions - DS2148 Application Note 2706: Bit Error Rate Testing the DS314x Series of DS3/E3 Framers - DS2148 Application Note 3556: Configuring Dallas Semiconductor LIUs Without a Microcontroller - DS2148

Evaluation Kits

none

Design Guides

Communications (PDF)

Reliability Reports

Reliability Report: DS2148.pdf DS21Q48.pdf

Software/Models

DS2148T_33 IBIS Model DS2148G_5 IBIS Model DS2148T_5 IBIS Model DS2148G_33 IBIS Model DS21Q48_5 IBIS Model DS21Q48_33 IBIS Model DS21Q48 Cadence Concept Symbol DS21Q48 Cadence Allegro Symbol DS21Q48 Logical Symbol-XML Format

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