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MAX9152
800Mbps, LVDS/LVPECL-to-LVDS 2 x 2 Crosspoint Switch


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Status
Active: In Production.

Data Sheet
FULL DATA SHEET (PDF, 304kB)
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Description
he MAX9152 2 x 2 crosspoint switch is designed for applications requiring high speed, low power, and low-noise signal distribution. This device includes two LVDS/LVPECL inputs, two LVDS outputs, and two logic inputs that set the internal connections between differential inputs and outputs.

The MAX9152 can be programmed to connect any input to either or both outputs, allowing it to be used in the following configurations: 2 5 2 crosspoint switch, 2:1 mux, 1:2 demux, 1:2 splitter, or dual repeater. This flexibility makes the MAX9152 ideal for protection switching in fault-tolerant systems, loopback switching for diagnostics, fanout buffering for clock/data distribution, and signal regeneration for communication over extended distances.

Ultra-low 120psPK-PK (max) PRBS jitter ensures reliable communications in high-speed links that are highly sensitive to timing error, especially those incorporating clock-and-data recovery, or serializers and deserializers. The high-speed switching performance guarantees an 800Mbps data rate and less than 50ps (max) skew between channels.

LVDS inputs and outputs are compatible with the TIA/EIA-644 LVDS standard. The LVDS inputs are designed to also accept LVPECL signals directly, and PECL signals with an attenuation network. The LVDS outputs are designed to drive 75Ω or 100Ω loads, and feature a selectable differential output resistance to minimize reflections.

The MAX9152 is available in 16-pin TSSOP and SO packages, and consumes only 109mW while operating from a single +3.3V supply over the -40°C to +85°C temperature range.

Key Features
  • Pin-Programmable Configuration
    • 2 x 2 Crosspoint Switch
    • 2:1 Mux
    • 1:2 Demux
    • 1:2 Splitter
    • Dual Repeater
  • Ultra-Low 120psPK-PK (max) Jitter with 800Mbps, PRBS = 223 -1 Data Pattern
  • Low 50ps (max) Channel-to-Channel Skew
  • 109mW Power Dissipation
  • Compatible with ANSI TIA/EIA-644 LVDS Standard
  • Inputs Accept LVDS/LVPECL Signals
  • LVDS Output Rated for 75Ω and 100Ω Loads
  • Pin-Programmable Differential Output Resistance
  • Pin-Compatible Upgrade to DS90CP22 (SO Package)
  • Available in 16-Pin TSSOP Package (Half the Size of SO)

Key Specifications:  High-Speed Interconnect (Differential Signaling)
Part Number Features Signal Type Signal Type Functions Rx Tx Data Rates
(Mbps)
tPD
(ps)
VSUPPLY
(V)
Price
Rx Tx max See Notes
MAX9152 
Pin-Programmable Configuration
Pin-Programmable Output Resistance
LVDS
LVPECL
LVDS Switch 2 2 800 3400 3.3 $3.49 @1k
See All High-Speed Interconnect (Differential Signaling) (132)

Diagram
MAX9152: Functional Diagram
Functional Diagram

Application Notes
  • Application Note 873: High-Speed Signal Distribution Using Low-Voltage Differential Signaling (LVDS) - MAX9152
  • Application Note 1058: LVDS Enables High-Speed Signal Distribution in 3G Basestations - MAX9152

    Design Guides
  • Fiber (PDF)

    Reliability Reports
  • Reliability Report: MAX9152.pdf
  • Show FIT data for:

    Software/Models
  • MAX9152 IBIS Model

    Ordering Information
    Notes:

    1. Other options and links for purchasing parts are listed at: http://www.maxim-ic.com/sales.
    2. Didn't Find What You Need? Ask our applications engineers. Expert assistance in finding parts, usually within one business day.
    3. Part number suffixes: T or T&R = tape and reel;+ = RoHS/lead-free;# = RoHS/lead-exempt. More: SeeFull Data Sheet or Part Naming Conventions.
    4. * Some packages have variations, listed on the drawing. "PkgCode/Variation" tells which variation the product uses. Note that "+", "#", "-" in the part number suffix describes RoHS status. Package drawings may show a different suffix character.


    Devices: 1-8 of 8

    MAX9152 Free
    Sample
    Buy Status
    Package: TYPE PINS FOOTPRINT
      DRAWING CODE/VAR *
    Temp RoHS/Lead-Free?
    Materials Analysis
    MAX9152ESE    
    Active SOIC(N);16 pin;62 mm²
    Outline Drawing: 21-0041 (PDF)
    Land Pattern: 90-0097 (PDF)
    Use pkgcode/variation: S16-3*
    -40°C to +85°C RoHS/Lead-Free: No
    Materials Analysis
    MAX9152ESE-T    
    Active

    Land Pattern: Not Available

    -40°C to +85°C See data sheet
    MAX9152ESE+  
    Active SOIC(N);16 pin;62 mm²
    Outline Drawing: 21-0041 (PDF)
    Land Pattern: 90-0097 (PDF)
    Use pkgcode/variation: S16+3*
    -40°C to +85°C RoHS/Lead-Free: Lead Free
    Materials Analysis
    MAX9152ESE+T    
    Active SOIC(N);16 pin;62 mm²
    Outline Drawing: 21-0041 (PDF)
    Land Pattern: 90-0097 (PDF)
    Use pkgcode/variation: S16+3*
    -40°C to +85°C RoHS/Lead-Free: Lead Free
    Materials Analysis
    MAX9152EUE    
    Active TSSOP;16 pin;33 mm²
    Outline Drawing: 21-0066 (PDF)
    Land Pattern: 90-0117 (PDF)
    Use pkgcode/variation: U16-2*
    -40°C to +85°C RoHS/Lead-Free: No
    Materials Analysis
    MAX9152EUE-T    
    Active

    Land Pattern: Not Available

    -40°C to +85°C See data sheet
    MAX9152EUE+  
    Active TSSOP;16 pin;33 mm²
    Outline Drawing: 21-0066 (PDF)
    Land Pattern: 90-0117 (PDF)
    Use pkgcode/variation: U16+2*
    -40°C to +85°C RoHS/Lead-Free: Lead Free
    Materials Analysis
    MAX9152EUE+T    
    Active TSSOP;16 pin;33 mm²
    Outline Drawing: 21-0066 (PDF)
    Land Pattern: 90-0117 (PDF)
    Use pkgcode/variation: U16+2*
    -40°C to +85°C RoHS/Lead-Free: Lead Free
    Materials Analysis

    More Information
  • New Product Press Release 2001-05-11 

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    Document Ref.: 19-2003; Rev 0; 2001-06-01
    This page last modified: 2009-10-26


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