MAX9125, MAX9126 Quad LVDS Line Receivers with Integrated Termination

Description

The MAX9125/MAX9126 quad low-voltage differential signaling (LVDS) line receivers are ideal for applications requiring high data rates, low power, and reduced noise. The MAX9125/MAX9126 are guaranteed to receive data at speeds up to 500Mbps (250MHz) over controlled-impedance media of approximately 100Ω. The transmission media may be printed circuit (PC) board traces or cables.

The MAX9125/MAX9126 accept four LVDS differential inputs and translate them to 3.3V CMOS outputs. The MAX9126 features integrated parallel termination resistors (nominally 115Ω), which eliminate the requirement for four discrete termination resistors and reduce stub length. The MAX9125 inputs are high impedance and require an external termination resistor when used in a point-to-point connection.

The devices support a wide common-mode input range of 0.05V to 2.35V, allowing for ground potential differences and common-mode noise between the driver and the receiver. A fail-safe feature sets the output high when the inputs are open, or when the inputs are undriven and shorted or parallel terminated. The EN and EN-bar inputs control the high-impedance output and are common to all four receivers. Inputs conform to the ANSI TIA/EIA-644 LVDS standard. The MAX9125/ MAX9126 operate from a single +3.3V supply, are specified for operation from -40°C to +85°C, and are available in 16-pin TSSOP and SO packages. Refer to the MAX9124 data sheet for a quad LVDS line driver.

Key Features

Integrated Termination Eliminates Four External Resistors (MAX9126)
Pin Compatible with DS90LV032A
Guaranteed 500Mbps Data Rate
300ps Pulse Skew (max)
Conform to ANSI TIA/EIA-644 LVDS Standard
Single +3.3V Supply
Low 70µA Shutdown Supply current
Fail-Safe Circuit

Key Specifications: High-Speed Interconnect (Differential Signaling)

Part Number

Features

Signal Type

Functions

Data Rates
(Mbps)

t_PD
(ps)

V_SUPPLY
(V)

Price

max

See Notes

MAX9125

Fail-Safe Inputs

Flow-Through Pinout

LVDS

CMOS

LVTTL

Level Translator

500

3300

3.3

$1.99 @1k

MAX9126

Fail-Safe Inputs

Flow-Through Pinout

Integrated Input Termination

$2.11 @5k

See All High-Speed Interconnect (Differential Signaling) (132)

Diagram

Typical Application Circuit

Application Notes

Application Note 873: High-Speed Signal Distribution Using Low-Voltage Differential Signaling (LVDS) - MAX9125

Design Guides

Fiber (PDF)

Reliability Reports

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Software/Models

MAX9125 IBIS Model

Ordering Information

Notes:

Other options and links for purchasing parts are listed at: http://www.maxim-ic.com/sales.
Didn't Find What You Need? Ask our applications engineers. Expert assistance in finding parts, usually within one business day.
Part number suffixes: T or T&R = tape and reel;+ = RoHS/lead-free;# = RoHS/lead-exempt. More: SeeFull Data Sheet or Part Naming Conventions.
* Some packages have variations, listed on the drawing. "PkgCode/Variation" tells which variation the product uses. Note that "+", "#", "-" in the part number suffix describes RoHS status. Package drawings may show a different suffix character.

Devices: 1-8 of 8

MAX9125 Free
Sample Buy Status

Package: TYPE PINS FOOTPRINT

DRAWING CODE/VAR *

Temp RoHS/Lead-Free?
Materials Analysis

MAX9125ESE+

Active SOIC(N);16 pin;62 mm²
Outline Drawing: 21-0041 (PDF)
Land Pattern: 90-0097 (PDF)
Use pkgcode/variation: S16+3*
-40°C to +85°C RoHS/Lead-Free: Lead Free
Materials Analysis

MAX9125ESE+T

Active SOIC(N);16 pin;62 mm²
Outline Drawing: 21-0041 (PDF)
Land Pattern: 90-0097 (PDF)
Use pkgcode/variation: S16+3*
-40°C to +85°C RoHS/Lead-Free: Lead Free
Materials Analysis

MAX9125ESE

Active SOIC(N);16 pin;62 mm²
Outline Drawing: 21-0041 (PDF)
Land Pattern: 90-0097 (PDF)
Use pkgcode/variation: S16-3*
-40°C to +85°C RoHS/Lead-Free: No
Materials Analysis

MAX9125ESE-T

Active

Land Pattern: Not Available

-40°C to +85°C See data sheet

MAX9126 Free
Sample Buy Status

Package: TYPE PINS FOOTPRINT

DRAWING CODE/VAR *

Temp RoHS/Lead-Free?
Materials Analysis

MAX9126ESE+

Active SOIC(N);16 pin;62 mm²
Outline Drawing: 21-0041 (PDF)
Land Pattern: 90-0097 (PDF)
Use pkgcode/variation: S16+3*
-40°C to +85°C RoHS/Lead-Free: Lead Free
Materials Analysis

MAX9126ESE+T

Active

Land Pattern: Not Available

-40°C to +85°C See data sheet

MAX9126EUE+

Active TSSOP;16 pin;33 mm²
Outline Drawing: 21-0066 (PDF)
Land Pattern: 90-0117 (PDF)
Use pkgcode/variation: U16+2*
-40°C to +85°C RoHS/Lead-Free: Lead Free
Materials Analysis

MAX9126EUE+T

Active

Land Pattern: Not Available

-40°C to +85°C See data sheet

More Information

New Product Press Release 2001-06-01

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Document Ref.: 19-1908; Rev 0; 2001-06-18
This page last modified: 2007-06-15