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MAX4551, MAX4552, MAX4553
±15kV ESD-Protected, Quad, Low-Voltage, SPST Analog Switches


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Status
Active: In Production.

Description
FULL DATA SHEET (PDF, 336kB)
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The MAX4551/MAX4552/MAX4553 are quad, low-voltage, single-pole/single-throw (SPST) analog switches. Each switch is protected against ±15kV electrostatic discharge (ESD) shocks, without latchup or damage. On-resistance (100Ωmax) is matched between switches to 4Ω max, and is flat (8Ω max) over the specified signal range. Each switch can handle rail-to-rail analog signals. The off-leakage current is only 1nA at +25°C and 10nA at +85°C.

The MAX4551 has four normally closed (NC) switches, and the MAX4552 has four normally open (NO) switches. The MAX4553 has two NC and two NO switches.

These CMOS switches can operate with dual power supplies ranging from ±2V to ±6V or a single supply between +2V and +12V. They are fully specified for single +2.7V operation.

All digital inputs have +0.8V and +2.4V logic thresholds, ensuring TTL/CMOS-logic compatibility when using ±5V or a single +5V supply.

Key Features   Applications/Uses
  • ±15kV ESD Protection per IEC 1000-4-2
  • +2V to +12V Single Supply
  • ±2V to ±6V Dual Supplies
  • 120Ω Signal Paths with ±5V Supplies
  • Low Power Consumption: < 1µW
  • 4 Separately Controlled SPST Switches
  • Rail-to-Rail Signal Handling
  • Pin-Compatible with Industry-Standard DG211/DG212/DG213
  • TTL/CMOS-Compatible Inputs with Dual ±5V or Single +5V Supply

 

Key Specifications:  Switches and Multiplexers (Mid Voltage)
Part Number Functions Config. Channels Normal Position VSUPPLY (Single)
(V)
VSUPPLY (Single)
(V)
VSUPPLY (Dual)
(±V)
VSUPPLY (Dual)
(±V)
RON
(Ω)
IL(OFF)
(nA)
tON
(ns)
tOFF
(ns)
QINJECTION
(pC)
CON
(pF)
COFF
(pF)
Price
min max min max max max min max max max See Notes
MAX4551  Switch SPST 4 Closed 2 12 2 6 120 1 110 90 5 10 3 $1.26 @1k
MAX4552  Open $1.26 @1k
MAX4553  Open/Closed $1.26 @1k
See All Switches and Multiplexers (Mid Voltage) (297)

Diagram
MAX4551, MAX4552, MAX4553: Pin Configuration
Pin Configuration

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    Document Ref.: 19-1391; Rev 0; 1998-10-01
    This page last modified: 2009-11-05


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