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MAX1011
Low-Power, 90Msps, 6-Bit ADC


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Description
FULL DATA SHEET (PDF, 120kB)
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The MAX1011 is a 6-bit analog-to-digital converter (ADC) that combines high-speed, low-power operation with a user-selectable input range, an internal reference, and a clock oscillator. The ADC converts analog signals into binary-coded digital outputs at sampling rates up to 90Msps. The ability to directly interface with baseband signals makes the MAX1011 ideal for use in a wide range of communications and instrumentation applications.

The MAX1011's input amplifier features a true differential input, a -0.5dB analog bandwidth of 55MHz, and a user-programmable input full-scale range of 125mVp-p, 250mVp-p, or 500mVp-p. With an AC-coupled signal, input offset is typically less than 1/4LSB. Dynamic performance is 5.85 effective number of bits (ENOB) with a 20MHz analog input signal, or 5.7 ENOB with a 50MHz signal.

The MAX1011 operates with +5V analog and +3.3V digital supplies for easy interfacing to +3.3V-logic-compatible digital signal processors and microprocessors. It comes in a 24-pin QSOP package.

Key Features   Applications/Uses
  • High Sampling Rate: 90Msps
  • Low Power Dissipation: 215mW
  • Excellent Dynamic Performance:
    • 5.85 ENOB with 20MHz Analog Input
    • 5.7 ENOB with 50MHz Analog Input
  • ±1/4LSB INL and DNL (typ)
  • ±1/4LSB Input Offset (typ)
  • Internal Bandgap Voltage Reference
  • Internal Oscillator with Overdrive Capability
  • 55MHz (-0.5dB) Bandwidth Input Amplifier with True Differential Input
  • User-Selectable Full-Scale Range (125mVp-p, 250mVp-p, or 500mVp-p)
  • Single-Ended or Differential Input Drive
  • Flexible, 3.3V, CMOS-Compatible Digital Outputs

 
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    Key Specifications:   High-Speed ADCs (> 5Msps)
    Part Number Input Channels Resolution (Bits) Sample Rate (max) (Msps) Sample Rate (max) (Msps) AC Specs @ fIN (MHz) SFDR (dBc) ENOB (bits) SINAD (dB) INL (±LSB) DNL (±LSB) Full-Power BW (MHz) Typ. Supply Current (mA)
    MAX1011  1 6 90 90 20 59 5.85 37 0.25 0.25 55 45.5
    See All High-Speed ADCs (> 5Msps) (77)

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    Document Ref.: 19-1335; Rev 0a; 1998-02-01
    This page last modified: 2007-07-19


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