The MAX125/MAX126 are high-speed, multichannel,
14-bit data-acquisition systems (DAS) with simultaneous
track/holds (T/Hs). These devices contain a 14-bit, 3µs,
successive-approximation analog-to-digital converter
(ADC), a +2.5V reference, a buffered reference input,
and a bank of four simultaneous-sampling T/H amplifiers
that preserve the relative phase information of the
sampled inputs. The MAX125/MAX126 have two multiplexed
inputs for each T/H, allowing a total of eight
inputs. In addition, the converter is overvoltage tolerant
to ±17V; a fault condition on any channel will not harm
the IC. Available input ranges are ±5V (MAX125) and
±2.5V (MAX126).
An on-board sequencer converts one to four channels
per active-low CONVST pulse. In the default mode, one T/H output
(CH1A) is converted. An interrupt signal (active-low INT) is provided
after the last conversion is complete. Convert two,
three, or four channels by reprogramming the
MAX125/MAX126 through the bidirectional parallel
interface. Once programmed, the MAX125/MAX126
continue to convert the specified number of channels
per active-low CONVST pulse until they are reprogrammed.
The channels are converted sequentially, beginning with
CH1. The INT signal always follows the end of the last
conversion in a conversion sequence. The ADC converts
each assigned channel in 3µs and stores the
result in an internal 14x4 RAM. Upon completion of the
conversions, data can be accessed by applying successive
pulses to the active-low RD pin. Four successive reads
access four data words sequentially.
The parallel interface's data-access and bus-release
timing specifications are compatible with most popular
digital signal processors and 16-bit/32-bit microprocessors,
so the MAX125/MAX126 conversion results can be
accessed without resorting to wait states.
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