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MAX1005
IF Undersampler


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Status
Active: In Production.

Description
FULL DATA SHEET (PDF, 96kB)
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The MAX1005 is a combined digitizer and reconstruction integrated circuit designed to work in systems that demodulate and modulate communications signals. It integrates IF undersampling and signal synthesis functions into a single, low-power circuit. Its analog-to-digital converter (ADC) is used to directly sample or undersample a downconverted RF signal, while its digital-to-analog converter (DAC) recreates the IF sub-carrier and transmission data. The MAX1005's ADC is ideal for undersampling applications, due to the analog input amplifier's wide (15MHz) bandwidth. The DAC has very low glitch energy, which minimizes the transmission of unwanted spurious signals. An on-chip reference provides for low-noise ADC and DAC conversions.

The MAX1005 provides a high level of signal integrity from a low power budget. It operates from a single power supply, or from separate analog and digital supplies with independent voltages ranging from +2.7V to +5.5V. The MAX1005 can operate with an unregulated analog supply of 5.5V and a regulated digital supply down to 2.7V. This flexible power-supply operation saves additional power in complex digital systems.

The MAX1005 has three operating modes: transmit (DAC active), receive (ADC active), and shutdown (ADC and DAC inactive). In shutdown mode, the total supply current drops below 1µA. The device requires only 2.4µs to wake up from shutdown mode. The MAX1005 is ideal for hand-held, as well as base-station applications. It is available in a tiny 16-pin QSOP package specified for operation over both the commercial and extended temperature ranges.

Key Features   Applications/Uses
  • Differential-Input, 5-Bit ADC
  • Differential-Output, 7-Bit DAC
  • 15Msps Min Conversion Rate
  • 25MHz -1dB Full-Power Bandwidth
  • 44dB SFDR for ADC
  • 39dB at 10.7MHz SFDR (Imaged) for DAC
  • Internal Voltage Reference
  • Parallel Logic Interface
  • Single-Supply Operation (+2.7V to +5.5V)
  • 0.1µA Low-Power Shutdown Mode

 
  • PCS/N
  • PHS/P
  • PWT1900
  • Wireless Loops

Key Specifications:  Fast CODECs / Analog Front-End (AFE)
Part Number Input Chan. Conv. Speed
(Msps)
SNR
(dB)
Resolution
(bits)
Output Chan. Speed
(Msps)
SFDR
(dBc)
THD
(dBc)
VSUPPLY
(V)
Price
ADC ADC @ fIN DAC DAC DAC @ fOUT @ fOUT See Notes
MAX1005  1 15 44 @ 10.7MHz 7 1 15 39 @ 15MHz -28 @ 15MHz 2.7 to 5.5 $2.96 @1k
See All Fast CODECs / Analog Front-End (AFE) (15)

Diagram
MAX1005: Functional Diagram
Functional Diagram

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    Document Ref.: 19-1291; Rev 0; 1997-09-01
    This page last modified: 2009-11-05


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