The MAX3270 is a complete Clock Recovery and Data Retiming IC for 155Mbps and 622Mbps SDH/SONET and ATM applications. The MAX3270 meets Bellcore and CCITT jitter tolerance specifications ensuring error-free data recovery. Recovered clock and data are phase aligned using a fully integrated phase-locked loop (PLL). An output frequency monitor (FM) is included to detect loss of PLL acquisition or a loss of input data.
The MAX3270 has differential ECL input and output interfaces, so it is less susceptible to noise in a high-frequency environment. The fully integrated PLL includes an integrated phase-frequency detector that eliminates the need for external references.
Key Features
Applications/Uses
Supports Both 155Mbps and 622Mbps Clock Recovery and Data Retiming
Fully Integrated Phase/Frequency Detector
Capable of Switching to an External Clock
Differential 100K ECL Data and Clock I/Os
Output Monitor Provides Lock Detection
No External Reference Clock Required
155Mbps (STM-1/OC-3) SDH/SONET Transmission Systems
* Some packages have variations, listed on the drawing. "PkgCode/Variation" tells which variation the product uses. Note that "+", "#", "-" in the part number suffix describes RoHS status. Package drawings may show a different suffix character.
Download
E-Mail