QuickView

Technical Documents

Ordering Info

More Information

User Comments (0)

All

Description

FULL DATA SHEET (PDF, 264kB) Download   E-Mail The MAX3270 is a complete Clock Recovery and Data Retiming IC for 155Mbps and 622Mbps SDH/SONET and ATM applications. The MAX3270 meets Bellcore and CCITT jitter tolerance specifications ensuring error-free data recovery. Recovered clock and data are phase aligned using a fully integrated phase-locked loop (PLL). An output frequency monitor (FM) is included to detect loss of PLL acquisition or a loss of input data. The MAX3270 has differential ECL input and output interfaces, so it is less susceptible to noise in a high-frequency environment. The fully integrated PLL includes an integrated phase-frequency detector that eliminates the need for external references.

Key Features		Applications/Uses
Supports Both 155Mbps and 622Mbps Clock Recovery and Data Retiming Fully Integrated Phase/Frequency Detector Capable of Switching to an External Clock Differential 100K ECL Data and Clock I/Os Output Monitor Provides Lock Detection No External Reference Clock Required		155Mbps (STM-1/OC-3) SDH/SONET Transmission Systems 155Mbps/622Mbps ATM/SONET Access Nodes 622Mbps (STM-4/OC-12) SDH/SONET Transmission Systems Add/Drop Multiplexers Cross-Connects

Diagram

Typical Operating Circuit

Didn't Find What You Need?

Next Day Product Selection Assistance from Applications Engineers Parametric Search Applications Help

QuickView

Technical Documents

Ordering Info

More Information

Description   Key Features   Applications/Uses   Key Specifications   Diagram

Data Sheet   Application Notes   Design Guides   Engineering Journals   Reliability Reports   Software/Models   Evaluation Kits

Price and Availability   Samples   Buy Online   Package Information   Lead-Free Information

Related Products   Notes and Comments   Evaluation Kits