Search Results: HDLC

HDLC Configuration of Framers and Transceivers - Maxim [Open results in new window]
... BITMAP, NAME, VALUE, FUNCTION. T1TCR1.2, TFDLS, 1, Source FDL data from the HDLC
controller. T1TCR2.6, TSCL96, 0, Disable SLC-96 and D4 Fs-bit insertion. ...
korea.maxim-ic.com/appnotes.cfm/an_pk/394 - 52k

DS31256 HDLC Controller Step-by-Step Configuration—Bridge Mode ... [Open results in new window]
This application note describes how to configure a single T1 port on DS31256
HDLC Controller operating in bridge mode. The sample ...
korea.maxim-ic.com/appnotes.cfm/an_pk/2872 - 73k

DS31256 HDLC Controller Step-by-Step Configuration—Configuration ... [Open results in new window]
This application note describes how to configure a single T1 port on DS31256
HDLC Controller operating in configuration mode. The ...
korea.maxim-ic.com/appnotes.cfm/an_pk/2871 - 75k

Initialization Steps for the DS31256 - Maxim [Open results in new window]
... 핵심 단어: HDLC Controller, DS31256. ... Abstract: The recommended initialization sequences
for DS31256 Envoy HDLC controller before sending packet data. ...
korea.maxim-ic.com/appnotes.cfm/an_pk/2867 - 25k

DS21354/DS21554 vs. DS2154 Single Chip Transceivers - Maxim [Open results in new window]
... 2. Additional Functionality. New Features, Data Sheet Section. HDLC controller,
15. JTAG, 17. ... CCR6, 1Dh, Common Control Register 6. 3.2 HDLC Controller (section ...
korea.maxim-ic.com/appnotes.cfm/an_pk/361 - 26k

Examples of DS31256 Applications - Maxim [Open results in new window]
Provides some application examples of the Dallas
Semiconductor/Maxim DS31256 HDLC Controller. ...
korea.maxim-ic.com/appnotes.cfm/an_pk/3345 - 24k

Internal Test Registers for the DS31256 - Maxim [Open results in new window]
... 핵심 단어: hdlc controller, test registers, HDLC,
controllers. 관련 부품. APP 3071: Mar 09, 2004. ...
korea.maxim-ic.com/appnotes.cfm/an_pk/3071 - 20k

Interleaved Bus Operation - Maxim [Open results in new window]
The example application includes the DS31256 HDLC controller that can be used to
interleave multiple DS21FF4 framers onto a PCI bus using an 8MHz interl. ...
korea.maxim-ic.com/appnotes.cfm/an_pk/3760 - 28k

DS21352/DS21552 versus DS2152 Single Chip Transceiver - Maxim [Open results in new window]
... 2. Additional Functionality. New Features, Data Sheet Section. HDLC controller Buffer
depth increased from 16 to 64 bytes HDLC over DS0 functionality added, 15. ...
korea.maxim-ic.com/appnotes.cfm/an_pk/360 - 25k

DS31256 -- T3/E3 MUX/DS3112 Hardware Connections - Maxim [Open results in new window]
... 핵심 단어: HDLC Controller, Framer, M13/E13 MUX, T1/E1, Line Interface Unit. ... It includes
the HDLC Controller, Framer, MUX and Line Interface Unit. Overview. ...
korea.maxim-ic.com/appnotes.cfm/an_pk/3344 - 20k

DS31256 Loopback Modes - Maxim [Open results in new window]
Provides the definition and functionality of different loop back modes
of the Dallas Semiconductor DS31256 HDLC Controller. ...
korea.maxim-ic.com/appnotes.cfm/an_pk/399 - 24k

DS31256 Gapped Clock Applications - Maxim [Open results in new window]
This application note discusses how to realize gapped clock applications with the
DS31256 HDLC Controller. ... 핵심 단어: gapped clock, hdlc controller, HDLC. ...
korea.maxim-ic.com/appnotes.cfm/an_pk/392 - 25k

DS31256 PCI Bus Utilization - Maxim [Open results in new window]
... 핵심 단어: HDLC Controller, PCI Bus Utilization, app note
3475. 관련 부품. APP 3475: Mar 23, 2005. ...
korea.maxim-ic.com/appnotes.cfm/an_pk/3475 - 32k

DS31256 -- 레지스터 덤프용 코드 예 - Maxim [Open results in new window]
Provides the example code for registers dump of the Dallas
Semiconductor/MaximDS31256 HDLC Controller. ...
korea.maxim-ic.com/appnotes.cfm/an_pk/3259 - 18k

DS21Q44 vs. DS21Q43A - Maxim [Open results in new window]
... Per-channel idle control, 11. HDLC controller: 64-byte buffers; Can be used on Sa
bits or DS0 channels. 15. 8Mbps interleaved PCM bus operation, 16. JTAG support ...
korea.maxim-ic.com/appnotes.cfm/an_pk/356 - 54k

Ethernet-over-PDH Technology Overview - Maxim [Open results in new window]
... 핵심 단어: EoPDH, EoPoS, EoP, Ethernet-Over-PDH, Ethernet Over PDH, GFP, HDLC, cHDLC,
Frame Encapsulation, Ethernet Mapping, Link Aggregation, VCAT, Link ...
korea.maxim-ic.com/appnotes.cfm/an_pk/3849 - 40k

DS21Q41, DS21Q43 Interfacing to the MC68MH360 QUICC32 - Maxim [Open results in new window]
... between the DS21Q41 or DS21Q43 and the Motorola MC68MH360 (QUICC32) are shown in
Figure 1. The MC68MH360 can be configured as an HDLC controller implementing ...
korea.maxim-ic.com/appnotes.cfm/an_pk/320 - 21k

DS21Q42 vs. DS21Q41B - Maxim [Open results in new window]
... HDLC controller: 64-byte buffers; Configurable for FDL or DS0 access. 14. Programmable
inband code generation and detection, 16. Interleaved PCM bus operation, ...
korea.maxim-ic.com/appnotes.cfm/an_pk/357 - 49k

DS33Z11 - Ethernet LAN To Unframed T1/E1 WAN Bridge - Maxim [Open results in new window]
... 핵심 단어: T1/E1, WAN, LAN, ethernet, HDLC, X.86, elite, bridge, t1, e1, wan
bridge, eline, elan, tls. 관련 부품. APP 3411: Dec 22, 2004. ...
korea.maxim-ic.com/appnotes.cfm/an_pk/3411 - 26k