Ethernet-over-PDH Technology Overview - Maxim   [Open results in new window]
... Keywords: EoPDH, EoPoS, EoP, Ethernet-Over-PDH, Ethernet Over PDH, GFP, HDLC, cHDLC,
Frame Encapsulation, Ethernet Mapping, Link Aggregation, VCAT, Link ...
www.maxim-ic.com/appnotes.cfm/appnote_number/3849 - 45k

DS33X162 Product Family FAQ - Maxim   [Open results in new window]
... DSL? What is the difference between HDLC and GFP encapsulation? Can ... Q) What
is the difference between HDLC and GFP encapsulation? A) HDLC ...
www.maxim-ic.com/appnotes.cfm/appnote_number/4124 - 48k

HDLC Configuration of Framers and Transceivers - Maxim   [Open results in new window]
... BITMAP, NAME, VALUE, FUNCTION. T1TCR1.2, TFDLS, 1, Source FDL data from the HDLC
controller. T1TCR2.6, TSCL96, 0, Disable SLC-96 and D4 Fs-bit insertion. ...
www.maxim-ic.com/appnotes.cfm/an_pk/394 - 50k

[PDF] DS31256 HDLC Controller Step-by-Step Configuration—Bridge Mode   [Open results in new window]
... Keywords: DS31256, HDLC controller, bridge mode, Dec 04, 2003 APPLICATION NOTE 2872
DS31256 HDLC Controller Step-by-Step Configuration—Bridge Mode ...
pdfserv.maxim-ic.com/en/an/AN2872.pdf

[PDF] HDLC Configuration of Framers and Transceivers - AN394   [Open results in new window]
... FUNCTION T1TCR1.2 TFDLS 1 Source FDL data from the HDLC controller
T1TCR2.6 TSCL96 0 Disable SLC-96 and D4 Fs-bit insertion T1TCR2 ...
pdfserv.maxim-ic.com/en/an/AN394.pdf

DS31256 HDLC Controller Step-by-Step Configuration—Bridge Mode ...   [Open results in new window]
This application note describes how to configure a single T1 port on DS31256
HDLC Controller operating in bridge mode. The sample ...
www.maxim-ic.com/appnotes.cfm/an_pk/2872 - 72k

DS31256 HDLC Controller Step-by-Step Configuration—Configuration ...   [Open results in new window]
This application note describes how to configure a single T1 port on DS31256
HDLC Controller operating in configuration mode. The ...
www.maxim-ic.com/appnotes.cfm/an_pk/2871 - 74k

Initialization Steps for the DS31256 - Maxim   [Open results in new window]
... Initialization Steps for the DS31256. Abstract: The recommended initialization
sequences for DS31256 Envoy HDLC controller before sending packet data. ...
www.maxim-ic.com/appnotes.cfm/an_pk/2867 - 24k

DS21354/DS21554 vs. DS2154 Single Chip Transceivers - Maxim   [Open results in new window]
... 2. Additional Functionality. New Features, Data Sheet Section. HDLC controller,
15. JTAG, 17. ... CCR6, 1Dh, Common Control Register 6. 3.2 HDLC Controller (section ...
www.maxim-ic.com/appnotes.cfm/an_pk/361 - 25k

[PDF] DS21354/DS21554 vs. DS2154 Single Chip Transceivers - AN361   [Open results in new window]
... contained in the DS21354/DS21554 are highlighted along with the additional registers
required for support of the new features, HDLC controller, interleaved bus ...
pdfserv.maxim-ic.com/en/an/AN361.pdf

Examples of DS31256 Applications - Maxim   [Open results in new window]
Provides some application examples of the Dallas
Semiconductor/Maxim DS31256 HDLC Controller. ...
www.maxim-ic.com/appnotes.cfm/an_pk/3345 - 23k

[PDF] Application Note 2867 Initialization Steps for the DS31256   [Open results in new window]
... If you have further questions about our HDLC controller products, please contact
the Telecommunication Applications support team via email telecom.support ...
pdfserv.maxim-ic.com/en/an/app2867.pdf

Internal Test Registers for the DS31256 - Maxim   [Open results in new window]
... Keywords: hdlc controller, test registers, HDLC, controllers. Related Parts. ... DS31256,
256-Channel, High-Throughput HDLC Controller, Full Data Sheet (PDF, 1.2MB), ...
www.maxim-ic.com/appnotes.cfm/an_pk/3071 - 19k

[PDF] Examples of DS31256 Applications - AN3345   [Open results in new window]
... Keywords: HDLC controller, framer, transceiver, T1/E1, T3/E3, hdlc, controller,
t1, e1, t3, e3 Sep 09, 2004 APPLICATION NOTE 3345 ...
pdfserv.maxim-ic.com/en/an/AN3345.pdf

Interleaved Bus Operation - Maxim   [Open results in new window]
The example application includes the DS31256 HDLC controller that can be used to
interleave multiple DS21FF4 framers onto a PCI bus using an 8MHz interl. ...
www.maxim-ic.com/appnotes.cfm/an_pk/3760 - 27k

[PDF] Interleaved Bus Operation - AN3760   [Open results in new window]
... Keywords: interleaved bus operation, IBO, framers, MUX, PCI, frame interleaving,
hdlc controller, T1, E1, T3, E3 Mar 20, 2006 APPLICATION ...
pdfserv.maxim-ic.com/en/an/AN3760.pdf

DS31256 -- T3/E3 MUX/DS3112 Hardware Connections - Maxim   [Open results in new window]
... Keywords: HDLC Controller, Framer, M13/E13 MUX, T1/E1, Line Interface Unit. Related
Parts. ... It includes the HDLC Controller, Framer, MUX and Line Interface Unit. ...
www.maxim-ic.com/appnotes.cfm/an_pk/3344 - 19k

DS21352/DS21552 versus DS2152 Single Chip Transceiver - Maxim   [Open results in new window]
... 2. Additional Functionality. New Features, Data Sheet Section. HDLC controller Buffer
depth increased from 16 to 64 bytes HDLC over DS0 functionality added, 15. ...
www.maxim-ic.com/appnotes.cfm/an_pk/360 - 25k

[PDF] DS21352/DS21552 versus DS2152 Single Chip Transceiver - AN360   [Open results in new window]
... New Features Data Sheet Section HDLC controller Buffer depth increased from
16 to 64 bytes HDLC over DS0 functionality added 15 JTAG 19 ...
pdfserv.maxim-ic.com/en/an/AN360.pdf

[PDF] Internal Test Registers for the DS31256 - AN3071   [Open results in new window]
... Keywords: hdlc controller, test registers, HDLC, controllers Feb 26, 2004
APPLICATION NOTE 3071 Internal Test Registers for the DS31256 ...
pdfserv.maxim-ic.com/en/an/AN3071.pdf