Determining Clock Accuracy Requirements for UART Communications ... [Open results in new window]
... A new frame is recognized by the falling edge at the beginning of the active-low
Start bit, when the
signal changes from the active-high Stop bit or bus idle ...
www.maxim-ic.com/appnotes.cfm/appnote_number/2141 - 81k
Interfacing the DS3144 Framer with the DS3154 LIU - Maxim [Open results in new window]
... If RCLKI = 0 in the MC5 register, data is clocked into the framer on the rising
edge of RCLK. If RCLKI
= 1, data is clocked in on the falling edge of RCLK. ...
www.maxim-ic.com/appnotes.cfm/appnote_number/3111 - 51k
Watchdogs Improve System Reliability—How to Choose the Right ... [Open results in new window]
... Most watchdogs are edge triggered. Therefore, either a rising or a falling
edge on the watchdog
input (WDI) will clear the counter. ...
www.maxim-ic.com/appnotes.cfm/appnote_number/1926 - 48k
C-Code Software Routines for Using the SPI Interface on the ... [Open results in new window]
... Data is clocked in at SDIN on the rising edge of SCLK. ... The address is clocked
in at SDIN
on the rising edge of SCLK, as described above. ...
www.maxim-ic.com/appnotes.cfm/appnote_number/4184 - 57k
The MAX2265 Is Ideal for EDGE Base-Station Pre-Driver Applications ... [Open results in new window]
... EDGE, which stands for "Enhanced Data Rates for GSM Evolution," essentially triples
the existing GSM data rate from 1-bit/symbol GMSK (gaussian minimum shift ...
www.maxim-ic.com/appnotes.cfm/an_pk/1829 - 22k
[PDF] The MAX2265 Is Ideal for EDGE Base-Station Pre-Driver Applications ... [Open results in new window]
... EDGE, which stands for "Enhanced Data Rates for GSM Evolution," essentially triples
the existing GSM data rate from 1-bit/symbol GMSK (gaussian minimum shift ...
pdfserv.maxim-ic.com/en/an/AN1829.pdf
[PDF] Critical DAC Parameters for Multi-Carrier GSM/EDGE Transmitters ... [Open results in new window]
... Feb 14, 2003 APPLICATION NOTE 1886 Critical DAC Parameters for Multi-Carrier
GSM/EDGE Transmitters ...
DAC Dynamic Performance Requirements for GSM/EDGE ...
pdfserv.maxim-ic.com/en/an/AN1886.pdf
Critical DAC Parameters for Multi-Carrier GSM/EDGE Transmitters ... [Open results in new window]
... APPLICATION NOTE 1886. Critical DAC Parameters for Multi-Carrier GSM/EDGE
Transmitters. ... DAC
Dynamic Performance Requirements for GSM/EDGE. ...
www.maxim-ic.com/appnotes.cfm/an_pk/1886 - 27k
[PDF] 500mW PHS Transmitter Meets Transient Spectrum Requirements with ... [Open results in new window]
... Requirements with Edge Control ... We use a standard PHS source and a control
signal with varying
edge transition times and shapes. Case ...
pdfserv.maxim-ic.com/en/an/AN1997.pdf
500mW PHS Transmitter Meets Transient Spectrum Requirements with ... [Open results in new window]
... APPLICATION NOTE 1997. 500mW PHS Transmitter Meets Transient Spectrum Requirements
with Edge Control.
... Case #2: TX gate control signal with cosine edge shape. ...
www.maxim-ic.com/appnotes.cfm/an_pk/1997 - 23k
MAX12557 Schematic and Layout Suggestions - Maxim [Open results in new window]
... These resistors limit the high-frequency edge current into the internal chip GND
from ... For
a single-ended clock, the edges should be sharp, having the maximum ...
www.maxim-ic.com/appnotes.cfm/appnote_number/3558 - 53k
User's Guide to the DS28DG02 - Maxim [Open results in new window]
... SPI Mode, CPOL, CPHA, Description. 0 or (0,0), 0. 0. The clock idle state is low.
Data is captured on the rising
clock edge and shifted out on the falling clock ...
www.maxim-ic.com/appnotes.cfm/an_pk/4040 - 52k
[PDF] User's Guide to the DS28DG02 - AN4040 [Open results in new window]
... 0 or (0,0) 0 0 The clock idle state is low. Data is captured on the rising
clock edge and shifted out
on the falling clock edge. ...
pdfserv.maxim-ic.com/en/an/AN4040.pdf
Replacing the DS1202 with the DS1302 - Maxim [Open results in new window]
... note. Software 3-Wire Read Cycle. Data on the I/O pin must be read after
the falling edge of SCLK and
before the rising edge of SCLK. ...
www.maxim-ic.com/appnotes.cfm/an_pk/118 - 19k
[PDF] Replacing the DS1202 with the DS1302 - AN118 [Open results in new window]
... Software 3-Wire Read Cycle Data on the I/O pin must be read after the falling
edge of SCLK and before
the rising edge of SCLK. DS1202 ...
pdfserv.maxim-ic.com/en/an/AN118.pdf
[PDF] Transmit Pulse Control on the DS26518 T1/E1/J1 Transceiver ... [Open results in new window]
... Each edge can be moved in both positive and negative directions in increments
of 1/32 of TCLK. General
Recommendations ... Clock Edge (1CE) ...
pdfserv.maxim-ic.com/en/an/AN4325.pdf
[PDF] DS26528 and DS26524 Transmit Pulse Control - AN3718 [Open results in new window]
... registers. Each edge may be moved in both positive and negative directions
in increments of 1/32 of
TCLK. General Recommendations ...
pdfserv.maxim-ic.com/en/an/AN3718.pdf
[PDF] Using Maxim RTCs with 3-Wire Interface - AN619 [Open results in new window]
... Data for this write portion of the data transfer is clocked into the RTC on rising
clock edges. On the
eighth rising SCLK edge A7, the last bit of the Address ...
pdfserv.maxim-ic.com/en/an/AN619.pdf
[PDF] Inexpensive (Almost Free) Probe/Tweezers for Testing SMD ... [Open results in new window]
... The angles make a clean beveled edge on the copper and avoid rough, jagged trace
edges. Figure
4. The two rectangular spacers are soldered to one board. ...
pdfserv.maxim-ic.com/en/an/AN4459.pdf
Inexpensive (Almost Free) Probe/Tweezers for Testing SMD ... [Open results in new window]
... The angles make a clean beveled edge on the copper and avoid rough, jagged trace
edges. Figure
4. The two rectangular spacers are soldered to one board. ...
www.maxim-ic.com/appnotes.cfm/an_pk/4459 - 21k
