Search Results: ECL

Advantages of AC-Coupling in SerDes Applications - Maxim [Open results in new window]
... Keywords: AC-coupling, AC coupling, LVDS, ECL, level shifting, common-mode voltage,
SERDES, serializer, deserializer, ATT, maximum total attenuation, cable ...
www.maxim-ic.com/appnotes.cfm/appnote_number/4085 - 30k

ADC Captures 1Gsps - Maxim [Open results in new window]
... This termination may be connected anywhere between ground and -2V for compatibility
with standard emitter-coupled-logic (ECL) drive levels. ...
www.maxim-ic.com/appnotes.cfm/appnote_number/642 - 40k

LVDS Splitter Simplifies High-Speed Signal Distribution - Maxim [Open results in new window]
A discussion of some of the benefits of the low voltage differential signaling
(LVDS) standard compared to the more traditional ECL, PECL and CML standards for ...
www.maxim-ic.com/appnotes.cfm/an_pk/872 - 26k

[PDF] LVDS Splitter Simplifies High-Speed Signal Distribution - AN872 [Open results in new window]
... Keywords: LVDS, low voltage, differential signaling signalling, lvds, EIA/TIA-644,
high speed, clock distribution, ECL, PECL, CML, low noise emission, low ...
pdfserv.maxim-ic.com/en/an/AN872.pdf

[PDF] Applying HSTL Signals to PECL Input Devices - AN1752 [Open results in new window]
... PECL (positive supply referred ECL) is an older standard than HSTL and was developed
as a higher speed alternative to the TTL logic standards. ... ECL inputs and ...
pdfserv.maxim-ic.com/en/an/AN1752.pdf

Applying HSTL Signals to PECL Input Devices - Maxim [Open results in new window]
... PECL (positive supply referred ECL) is an older standard than HSTL and was developed
as a higher speed alternative to the TTL logic standards. ...
www.maxim-ic.com/appnotes.cfm/an_pk/1752 - 35k

[PDF] ADC Captures 1Gsps - AN642 [Open results in new window]
... This termination may be connected anywhere between ground and -2V for compatibility
with standard emitter-coupled-logic (ECL) drive levels. ...
pdfserv.maxim-ic.com/en/an/AN642.pdf

[PDF] Novel Storage Idea Supports Ultra-Fast Data Acquisition - AN948 [Open results in new window]
... Keywords: data acquisition system, analog to digital converter, ADC, flash,
time-interleaved quantizer, ECL-to- TTL level shifters, ECL termination, FR4, FIFO ...
pdfserv.maxim-ic.com/en/an/AN948.pdf

[PDF] Advantages of AC-Coupling in SerDes Applications - AN4085 [Open results in new window]
... Keywords: AC-coupling, AC coupling, LVDS, ECL, level shifting, common-mode voltage,
SERDES, serializer, deserializer, ATT, maximum total attenuation, cable ...
pdfserv.maxim-ic.com/en/an/AN4085.pdf

An Introduction to Jitter in Communications Systems - Maxim [Open results in new window]
... Sheet (PDF, 196kB), MAX9360, LVTTL/TTL/CMOS-to-Differential LVECL/ECL Translators,
Full Data Sheet (PDF, 100kB), MAX9374, Differential ...
www.maxim-ic.com/appnotes.cfm/an_pk/1916 - 39k

Charge Pump Converts -5V to 5V - Maxim [Open results in new window]
... A good example is emitter-coupled logic (ECL), which requires a main supply voltage
of -5.2V. For those systems that require a positive supply as well (to ...
www.maxim-ic.com/appnotes.cfm/an_pk/3534 - 19k

[PDF] Charge Pump Converts -5V to +5V - AN3534 [Open results in new window]
... A good example is emitter- coupled logic (ECL), which requires a main supply voltage
of -5.2V. For those systems that require a positive supply as well (to ...
pdfserv.maxim-ic.com/en/an/AN3534.pdf

[PDF] The MAX555 PLCC-to-TQFP Printed Circuit Board (PCB) Layout ... [Open results in new window]
... left side of the package. All 50Ω ECL termination resistors are located
adjacent to the input pins. The remaining two sides of ...
pdfserv.maxim-ic.com/en/an/AN1120.pdf

[PDF] Synchronizing Multiple High-Speed Multiplexed DACs for Transmit ... [Open results in new window]
... If a square wave (eg, ECL) clock is used for the DAC, synchronization between two
DACs can be achieved by using the simple high-speed logic circuit shown in ...
pdfserv.maxim-ic.com/en/an/AN3901.pdf

Synchronizing Multiple High-Speed Multiplexed DACs for Transmit ... [Open results in new window]
... If a square wave (eg, ECL) clock is used for the DAC, synchronization between two
DACs can be achieved by using the simple high-speed logic circuit shown in ...
www.maxim-ic.com/appnotes.cfm/an_pk/3901 - 28k

The MAX555 PLCC-to-TQFP Printed Circuit Board (PCB) Layout ... [Open results in new window]
... left side of the package. All 50Ω ECL termination resistors are located
adjacent to the input pins. The remaining two sides of ...
www.maxim-ic.com/appnotes.cfm/an_pk/1120 - 23k

[PDF] Comparator/DAC Combinations Solve Data-Acquisition Problems ... [Open results in new window]
... 8-bit DAC/comparator ICs from Maxim include the quad MAX516 (a), the high-speed,
TTL-compatible MAX910 (b), and the ECL-compatible MAX911 (not shown). ...
pdfserv.maxim-ic.com/en/an/AN647.pdf

Comparator/DAC Combinations Solve Data-Acquisition Problems ... [Open results in new window]
... 8-bit DAC/comparator ICs from Maxim include the quad MAX516 (a), the high-speed,
TTL-compatible MAX910 (b), and the ECL-compatible MAX911 (not shown). ...
www.maxim-ic.com/appnotes.cfm/an_pk/647 - 39k