Search Results: Bus

Charging Batteries from USB - Maxim [Open results in new window]
... This review of USB power bus characteristics include an overview of NiMH and Li+
battery technologies, charging methods, and charge termination techniques, and ...
www.maxim-ic.com/appnotes.cfm/appnote_number/3607 - 43k

1-Wire Communication Through Software - Maxim [Open results in new window]
... Abstract: A microprocessor can easily generate 1-Wire® timing signals if
a true bus master is not present (eg, DS2480B, DS2490). ...
www.maxim-ic.com/appnotes.cfm/appnote_number/126 - 59k

Determining Clock Accuracy Requirements for UART Communications ... [Open results in new window]
... RS-232 bus drivers invert as well as level shift, so a logic 1 is a negative
voltage on the bus, and a logic 0 is a positive voltage. ...
www.maxim-ic.com/appnotes.cfm/appnote_number/2141 - 81k

Interfacing the DS3144 Framer with the DS3154 LIU - Maxim [Open results in new window]
... The DS3144 interfaces to a variety of Line Interface Units (LIUs), microprocessor
buses, and other ... The DS3154 has both Hardware or CPU Bus configuration options ...
www.maxim-ic.com/appnotes.cfm/appnote_number/3111 - 51k

[PDF] Comparing the I²C Bus to the SMBus [Open results in new window]
... Keywords: I2C, SMB, serial interface, i2c bus, 2-wire buses, smbus Dec 01,
2000 APPLICATION NOTE 476 Comparing the I²C Bus to the SMBus ...
pdfserv.maxim-ic.com/en/an/AN476.pdf

Selecting a Serial Bus - Maxim [Open results in new window]
... they are left unterminated or terminated at one end only (typical with single-ended
buses). Table 1 shows the matrix of variations using popular bus systems. ...
www.maxim-ic.com/appnotes.cfm/an_pk/3967 - 37k

SPI/I²C Bus Lines Control Multiple Peripherals - Maxim [Open results in new window]
... APPLICATION NOTE 4024. SPI/I²C Bus Lines Control Multiple Peripherals. Abstract:
This ... voltage. System Management Bus (SMBus). Intel ...
www.maxim-ic.com/appnotes.cfm/an_pk/4024 - 42k

[PDF] Selecting a Serial Bus - AN3967 [Open results in new window]
... they are left unterminated or terminated at one end only (typical with single-ended
buses). Table 1 shows the matrix of variations using popular bus systems. ...
pdfserv.maxim-ic.com/en/an/AN3967.pdf

Interface a Multiplexed-Bus Real-Time Clock to a µP With Separate ... [Open results in new window]
... that include a multiplexed data-address bus, but some designers prefer to use such
"mux-bus" RTCs with processors whose data and address buses are separate ...
www.maxim-ic.com/appnotes.cfm/an_pk/1145 - 27k

[PDF] Proven Implementations of the I²C Bus [Open results in new window]
... Fast-mode I²C also dropped the support of similar buses often linked with the I²C
bus, ie, buses that were no longer compatible with the higher data rate. ...
pdfserv.maxim-ic.com/en/an/AN4267.pdf

Interleaved Bus Operation - Maxim [Open results in new window]
... Keywords: interleaved bus operation, IBO, framers, MUX, PCI, frame interleaving,
hdlc controller, T1, E1, T3, E3. Related Parts. ... Interleaved Bus Operation. ...
www.maxim-ic.com/appnotes.cfm/an_pk/3760 - 27k

[PDF] Level Translators For SPI™ and I²C Bus Signals [Open results in new window]
... APPLICATION NOTE 1159 Level Translators For SPI™ and I²C Bus Signals ... The SPI-bus
has 4 signals: active-low CS = active-low Chip select, SCLK = Clock, D ...
pdfserv.maxim-ic.com/en/an/AN1159.pdf

Using the DS5240/DS5250 as Drop-In Upgrades for the DS5002 - Maxim [Open results in new window]
... Additionally, the timing requirements for the external RAM(s) accessed through the
dedicated data bus changed slightly from the DS5002FP to the DS5240/DS5250. ...
www.maxim-ic.com/appnotes.cfm/appnote_number/2034 - 47k

Single-Wire Serial Bus Carries Isolated Power and Data - Maxim [Open results in new window]
... rather than a parallel bus. Serial buses include SPI, I²C, and the Dallas
1-Wire bus. The Dallas Semiconductor 1-Wire requires ...
www.maxim-ic.com/appnotes.cfm/an_pk/3754 - 22k

[PDF] SPI/I²C Bus Lines Control Multiple Peripherals [Open results in new window]
... APPLICATION NOTE 4024 SPI/I²C Bus Lines Control Multiple Peripherals ... A master and
a slave communicate through multiple bus lines over a serial interface. ...
pdfserv.maxim-ic.com/en/an/AN4024.pdf

Proven Implementations of the I²C Bus - Maxim [Open results in new window]
... Fast-mode I²C also dropped the support of similar buses often linked with the I²C
bus, ie, buses that were no longer compatible with the higher data rate. ...
www.maxim-ic.com/appnotes.cfm/an_pk/4267/ - 30k

Using Multiplexed Bus Clocks with a Microcontroller - Maxim [Open results in new window]
... APPLICATION NOTE 516. Using Multiplexed Bus Clocks with a Microcontroller.
Abstract: Multiplexed bus real-time clocks (RTCs) provide ...
www.maxim-ic.com/appnotes.cfm/an_pk/516 - 21k

A 50 Watt Internal Bus Architecture (IBA) Power Supply - Maxim [Open results in new window]
... APPLICATION NOTE 3539. A 50 Watt Internal Bus Architecture (IBA) Power Supply. ... An
Internal Bus Architecture (IBA) includes two power-conversion stages. ...
www.maxim-ic.com/appnotes.cfm/an_pk/3539 - 30k

Expanding TINI's IO Capability - Maxim [Open results in new window]
... the CPLD. On the TINIs400, the XC2C64 is connected to the memory bus of
the TINI microcontroller, the DS80C400. This connection ...
www.maxim-ic.com/appnotes.cfm/appnote_number/3664 - 50k