MAXQ Competitive Performance

Analysis of the ATmega8

Benchmark Study Details
The following table shows the tools used for the comparison with the TI benchmark study, plus the raw results of each individual benchmark in both fastest and smallest configurations.
Notes for the AVR benchmarks run on the IAR compiler:
  1. The MODEL used for each benchmark was SMALL.
  2. The 8-bit and 16-bit matrix benchmarks would not run correctly under the fastest configuration (simulation would not terminate) unless the medium optimization level was used (instead of the highest).
  3. FIR filter on the smallest configuration would not simulate (simulation would not terminate) even at the lowest optimization settings. Therefore, size and performance numbers from the fastest configuration are shown here.
  4. The Matrix Multiplication benchmark would not simulate correctly (simulation would not terminate) on the ATmega8, ATmega16, or ATmega32 targets. The ATmega64 target was used for this benchmark.
Processor ATmega8
Compiler IAR C/C++ Compiler for AVR 4.10B/W32 (4.10.2.3)
Linker IAR XLINK 4.59J (4.59.10.0)
  Smallest Configuration (Screen Shot) Fastest Configuration (Screen Shot)
PROJECT CODE + CONST CYCLES CODE + CONST CYCLES
8-bit Math 98 110 98 110
8-bit Matrix 318 1,508 304 1074
8-bit Switch 312 84 164 36
16-bit Math 162 275 154 266
16-bit Matrix 398 1,147 374 697
16-bit Switch 346 111 178 44
32-bit Math 306 746 296 731
Floating Point Math 1,026 1,614 1,046 1,565
FIR Filter 1,258 82,779 1,258 82,779
Matrix Multiplication 476 7,799 324 2,396
TOTALS 4,700 96,173 4,196 89,698
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