 |
|
|
|
|
Maxim >
Products >
Clock Generation and Distribution
|
|
|
Low-Jitter Fanout Buffers
Maxim fanout buffers contribute virtually zero jitter to clock trees.
Connecting a Maxim fanout buffer in series with one of our low-jitter clock generators, the total jitter is nearly the same as the clock generator alone.
Measured results for a 156.25MHz clock are shown below. The lower trace is the MAX3624 clock generator IC alone. The upper trace is the MAX9324 fanout buffer in series with the MAX3624 clock generator. Integrated phase jitter of 389fs for the combination demonstrates that the fanout buffer contributes negligible jitter.
More detailed buffer screen.
To demonstrate that good jitter performance is maintained for all frequencies, this measurement is summarized below for three different frequencies: 125MHz, 156.25MHz, and 312.5MHz.
| Frequency |
Integrated Phase Jitter (12kHz to 20MHz) |
| MAX3624 |
MAX3624 + MAX9324 |
| 312.5MHz |
0.33psRMS |
0.345psRMS |
| 156.25MHz |
0.348psRMS |
0.389psRMS |
| 125MHz |
0.364psRMS |
0.405psRMS |
Maxim offers three families of fanout devices:
- LVPECL fanout buffers
- LVDS fanout buffers
- Specialty fanout buffers: Large systems with multiple harmonically related frequencies often require synthesis and/or division in the clock tree. MAX9322 has 15 LVPECL outputs in four banks and includes programmable frequency division. MAX3671 and MAX3673 have 9 LVPECL outputs in two banks and include programmable frequency synthesis.
|
|
|
|
