* MAX706T MACROMODEL * ------------------------------ * Revision 0, 2/2007 * ------------------------------ * MAX706T is a low-cost uP supervisor. * ------------------------------ * Connections * 1 = /MR\ * 2 = VCC * 3 = GND * 4 = PFI * 5 = /PFO\ * 6 = WDI * 7 = /RESET\ * 8 = /WDO\ ***************** .SUBCKT MAX706T 1 2 3 4 5 6 7 8 VIVCC 2 12 0 ICC 3 2 47.49U GCC 2 3 2 3 20.45U XWD 6 9 10 8 12 3 WD XRST 1 10 7 12 3 RST XINV 7 9 12 3 INV XPFI 11 4 5 12 3 COMP VPFI 11 3 1.235 .ENDS ***************** *INVERTER **************** *IN, OUT, VCC, GND .SUBCKT INV 1 2 3 4 MPINV 2 1 3 3 PMOS W=10U L=2U MNINV 2 1 4 4 NMOS W=10U L=2U .MODEL NMOS NMOS(VTO=0.1 KP=6.50E-3 CBD=5P CBS=2P CGSO=1P CGDO=1P CGBO=1P) .MODEL PMOS PMOS(VTO=-0.1 KP=6.50E-3 CBD=5P CBS=2P CGSO=1P CGDO=1P CGBO=1P) .ENDS **************** *NAND **************** *IN1, IN2, OUT, VCC, GND .SUBCKT NAND 1 2 3 4 5 MP1 3 1 4 4 PMOS W=10U L=2U MP2 3 2 4 4 PMOS W=10U L=2U MN1 3 1 6 6 NMOS W=10U L=2U MN2 6 2 5 5 NMOS W=10U L=2U .MODEL NMOS NMOS(VTO=0.1 KP=6.50E-3 CBD=5P CBS=2P CGSO=1P CGDO=1P CGBO=1P) .MODEL PMOS PMOS(VTO=-0.1 KP=6.50E-3 CBD=5P CBS=2P CGSO=1P CGDO=1P CGBO=1P) .ENDS **************** *NOR **************** *IN1, IN2, OUT, VCC, GND .SUBCKT NOR 1 2 3 4 5 MP1 6 1 4 4 PMOS W=10U L=2U MP2 3 2 6 6 PMOS W=10U L=2U MN1 3 1 5 5 NMOS W=10U L=2U MN2 3 2 5 5 NMOS W=10U L=2U .MODEL NMOS NMOS(VTO=0.1 KP=6.50E-3 CBD=5P CBS=2P CGSO=1P CGDO=1P CGBO=1P) .MODEL PMOS PMOS(VTO=-0.1 KP=6.50E-3 CBD=5P CBS=2P CGSO=1P CGDO=1P CGBO=1P) .ENDS **************** *COMPARATOR **************** *IN-, IN+, OUT, VCC, GND .SUBCKT COMP 1 2 3 4 5 RL 4 6 100K MCMPI 6 7 9 9 NMOS W=4U L=2U VI1 9 1 0 VOFF 7 2 99M MCMPO 8 6 4 4 PMOS W=4U L=2U RO 8 10 100K VI2 10 5 0 F1 5 4 VI1 1 F2 5 4 VI2 1 X1 8 11 4 5 INV X2 11 3 4 5 INV .MODEL NMOS NMOS(VTO=0.1 KP=6.50E-3 CBD=5P CBS=2P CGSO=1P CGDO=1P CGBO=1P) .MODEL PMOS PMOS(VTO=-0.1 KP=6.50E-3 CBD=5P CBS=2P CGSO=1P CGDO=1P CGBO=1P) .ENDS **************** *WATCH-DOG **************** *WDI, RESET, VCCR, /WDO\, VCC, GND .SUBCKT WD 1 2 3 4 5 6 IOSC 6 7 10P COSC 7 6 12.02P DCLAMP 7 8 DX VCLAMP 8 6 1.5 MSW 7 9 6 6 NMOS W=10U L=2U XNOR 1 2 13 5 6 NOR XINV1 13 9 5 6 INV ECMP 10 6 7 6 1 XCMP 10 11 12 5 6 COMP VSC 11 6 1 XNAND 12 3 14 5 6 NAND XINV2 14 4 5 6 INV .MODEL DX D(N=0.001 CJO=10E-15) .MODEL NMOS NMOS(VTO=0.1 KP=6.50E-3 CBD=5P CBS=2P CGSO=1P CGDO=1P CGBO=1P) .MODEL PMOS PMOS(VTO=-0.1 KP=6.50E-3 CBD=5P CBS=2P CGSO=1P CGDO=1P CGBO=1P) .ENDS **************** *RESET O/P **************** */MR\, VCCR, /RESET\, VCC, GND .SUBCKT RST 1 2 3 4 5 VCCVTH 6 5 2.932 XCMP 6 4 2 4 5 COMP IMR 4 1 70U XMR1 1 7 4 5 INV XMR2 7 8 4 5 INV XNRST 8 2 9 4 5 NAND XIRST 9 10 4 5 INV ITO 5 11 25P CTO 11 5 5.379P DTO 11 14 DX VTO 14 5 1 MTO 11 12 5 5 NMOS W=10U L=2U XITO 10 12 4 5 INV XCMPTO 15 11 16 4 5 COMP VCMPTO 15 5 0.5 XO1 16 17 4 5 INV XO2 17 3 4 5 INV .MODEL DX D(N=0.001 CJO=10E-15) .MODEL NMOS NMOS(VTO=0.1 KP=6.50E-3 CBD=5P CBS=2P CGSO=1P CGDO=1P CGBO=1P) .MODEL PMOS PMOS(VTO=-0.1 KP=6.50E-3 CBD=5P CBS=2P CGSO=1P CGDO=1P CGBO=1P) .ENDS ****************