MAX3625

Low-Jitter, Precision Clock Generator with Three Outputs

0.14ps Jitter Enables Easy System Clocking

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Status Explanations for product status codes

All versions are Not Recommended for New Designs. See Ordering Information for recommended replacements.

Description

The MAX3625 is a low-jitter precision clock generator optimized for networking applications. The device integrates a crystal oscillator and a phase-locked loop (PLL) clock multiplier to generate high-frequency clock outputs for Ethernet, 10G Fibre Channel, and other networking applications.

Maxim's proprietary PLL design features ultra-low jitter and excellent power-supply noise rejection, minimizing design risk for network equipment.

The MAX3625 has three LVPECL outputs. Selectable output dividers and a selectable feedback divider allow a range of output frequencies.
 

Data Sheet

Download this datasheet in PDF formatDownload Rev 0 (PDF, 368kB)
Send this datasheet to any email addressE-Mail
An evaluation kit is available: MAX3625EVKIT

Key Features

  • Crystal Oscillator Interface: 24.8MHz to 27MHz
  • CMOS Input: Up to 320MHz
  • Output Frequencies
    • Ethernet: 125MHz, 156.25MHz, 312.5MHz
    • 10G Fibre Channel: 159.375MHz, 318.75MHz
  • Low Jitter
    • 0.14psRMS (1.875MHz to 20MHz)
    • 0.38psRMS (12kHz to 20MHz)
  • Excellent Power-Supply Noise Rejection
  • No External Loop Filter Capacitor Required
 

Applications/Uses

  • Ethernet Networking Equipment
  • Fibre Channel Storage Area Network
   

Diagram

MAX3625: Block Diagram
Block Diagram

More Information

New Product Press Release 2008-01-14 ]

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Information Index

Document Ref.: 19-1010 Rev 0; 2007-10-23
This page last modified: 2009-08-25




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