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MAX19711
10-Bit, 11Msps, Full-Duplex, Analog Front-End

Ultra-Low-Power, Highly Integrated Transmit and Receive AFE with CDMA Filters

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Active: In Production.

Description

FULL DATA SHEET Download Rev 0 (PDF, 956kB) E-Mail The MAX19711 is an ultra-low-power, highly integrated mixed-signal analog front-end (AFE) ideal for CDMA communication applications operating in full-duplex (FD) mode. Optimized for high dynamic performance and ultra-low power, the device integrates a dual 10-bit, 11Msps receive (Rx) ADC; dual 10-bit, 11Msps transmit (Tx) DAC with CDMA baseband filters; three fast-settling 12-bit aux-DAC channels for ancillary RF front-end control; and a 10-bit, 333ksps housekeeping aux-ADC. The typical operating power in FD mode is 37.5mW/42.7mW at a 4.915MHz/11MHz clock frequency. The Rx ADCs feature 54.8dB SNR and 74.2dBc SFDR at 1.875MHz input frequency with an 11MHz clock frequency. The analog I/Q input amplifiers are fully differential and accept 1.024VP-P full-scale signals. Typical I/Q channel matching is ±0.01° phase and ±0.01dB gain. The Tx DACs with CDMA lowpass filters feature -3dB cutoff frequency of 1.3MHz and > 64dBc stopband rejection at fIMAGE = 4.285MHz at fCLK = 4.915MHz. The analog I-Q full-scale output voltage range is selectable at ±410mV or ±500mV differential. The output DC common-mode voltage is selectable from 0.86V to 1.36V. The I/Q channel offset is adjustable to optimize radio lineup sideband/carrier suppression. Typical I-Q channel matching is ±0.03dB gain and ±0.07° phase. Two independent 10-bit parallel, high-speed digital buses used by the Rx ADC and Tx DAC allow full-duplex operation for frequency-division duplex applications. The Rx ADC and Tx DAC can be disabled independently to optimize power management. A 3-wire serial interface controls power-management modes, the aux-DAC channels, and the aux-ADC channels. The MAX19711 operates on a single 2.7V to 3.3V analog supply and 1.8V to 3.3V digital I/O supply. The MAX19711 is specified for the extended (-40°C to +85°C) temperature range and is available in a 56-pin, thin QFN package. The Selector Guide at the end of the data sheet lists other pin-compatible versions in this AFE family. For time-division duplex (TDD) applications, refer to the MAX19705–MAX19708 AFE family of products.

Key Features		Applications/Uses
Dual 10-Bit, 11Msps Rx ADC and Dual 10-Bit, 11Msps Tx DAC Ultra-Low Power 37.5mW/42.7mW at fCLK = 4.915MHz/11MHz, FD Mode 24.3mW at fCLK = 11MHz, Slow Rx Mode 34.5mW at fCLK = 11MHz, Slow Tx Mode Low-Current Standby and Shutdown Modes Integrated CDMA Filters with > 64dBc Stopband Rejection Programmable Tx DAC Common-Mode DC Level and I/Q Offset Trim Excellent Dynamic Performance SNR = 54.8dB at fIN = 1.875MHz (Rx ADC) SFDR = 75dBc at fOUT = 620kHz (Tx DAC) Three 12-Bit, 1µs Aux-DACs 10-Bit, 333ksps Aux-ADC with 4:1 Input Mux and Data Averaging Excellent Gain/Phase Match ±0.01° Phase, ±0.01dB Gain (Rx ADC) at fIN = 1.87MHz Multiplexed Parallel Digital I/O Serial-Interface Control Versatile Power-Control Circuits Shutdown, Standby, Idle, Tx/Rx Disable Miniature 56-Pin Thin QFN		CDMA Data Cards CDMA Handsets Portable Communication Equipment

Diagram

Typical Operating Circuit

Related Products
MAX19708	10-bit, 11Msps, Ultra-Low-Power Analog Front-End
MAX19705	10-bit, 7.5Msps, Ultra-Low-Power Analog Front-End
MAX19707	10-Bit, 45Msps, Ultra-Low-Power Analog Front-End
MAX19706	10-Bit, 22Msps, Ultra-Low-Power Analog Front-End
MAX19711	10-Bit, 11Msps, Full-Duplex, Analog Front-End
MAX19712	10-Bit, 22Msps, Full-Duplex, Analog Front-End
MAX19713	10-Bit, 45Msps, Full-Duplex, Analog Front-End
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Document Ref.: 19-0527 Rev 0; 2006-05-24
This page last modified: 2009-12-10